Resiliency and performance for cluster memory

1. A system, comprising:

a computing device comprising a processor and a memory; and

machine-readable instructions stored in the memory that, when executed by the processor, cause the computing device to at least:

split a local page into a plurality of subpages;

generate at least one parity subpage;

submit a write request for each of the plurality of subpages to a respective one of a plurality of memory hosts; and

submit an additional write request for the at least one parity subpage to an additional one of the plurality of memory hosts.

2. The system of claim 1 , wherein the machine-readable instructions, when executed by the processor, further cause the computing device to at least:

determine that one of the plurality of memory hosts storing the plurality of subpages or the at least one parity subpage has faulted;

retrieve a minimum number of remaining subpages from the combination of the plurality of subpages and the at least one parity page;

reconstruct a missing subpage or parity subpage from the minimum number of remaining subpages;

select a new memory host to store the missing subpage or parity subpage; and

submit a third write request to the new memory host for the missing subpage or parity subpage.

3. The system of claim 1 , wherein the machine-readable instructions, when executed by the processor, further cause the computing device to at least:

in response to a page-fault, retrieve a minimum number of subpages from the combination of the plurality of subpages and the at least one parity page;

reconstruct the local page based at least in part on the minimum number of subpages; and

load the local page into the memory of the computing device.

4. The system of claim 1 , wherein the machine-readable instructions, when executed by the processor, further cause the computing device to communicate a heartbeat to the plurality of memory hosts.

5. The system of claim 1 , wherein the machine-readable instructions, when executed by the processor, further cause the computing device to at least record in a local chunk map the chunks in which the plurality of subpages and the at least one parity page are stored and the offsets within the chunks in which the plurality of subpages and the at least one parity subpage are stored.

6. The system of claim 1 , wherein the additional write request for the at least one parity subpage to the additional one of the plurality of memory hosts specifies that the at least one parity subpage is to be stored on a disk of the additional one of the plurality of memory hosts.

7. A method implemented with a computer, comprising:

generating at least one parity page from at least a first local page and a second local page;

submitting a first write request for the first local page to a first one of a plurality of memory hosts;

submitting a second write request for the second local page to a second one of the plurality of memory hosts; and

submitting a third write request for the parity page to a third one of the plurality of memory hosts.

8. The method implemented with the computer of claim 7 , further comprising:

detecting that one of the plurality of memory hosts storing one of the first local page, second local page, or parity page has faulted;

retrieving a minimum number of remaining pages from the combination of the first local page, second local page, and parity page;

reconstructing a missing page or parity page from the minimum number of remaining pages;

selecting a new memory host to store the missing page or parity page; and

submitting a fourth write request to the new memory host for the missing page or parity page.

9. The method implemented with the computer of claim 7 , further comprising communicating a heartbeat to the plurality of memory hosts.

10. The method implemented with the computer of claim 7 , further comprising recording in a local chunk map the chunks in which the first local page, second local page, and parity page are stored and the offsets within the chunks in which the first local page, second local, page, and parity page are stored.

11. The method implemented with the computer of claim 7 , further comprising:

retrieving the first local page, the second local page, and the parity page from the plurality of memory hosts; and

freeing the first local page, the second local page, and the parity page in the memory.

12. The method implemented with the computer of claim 7 , further comprising:

in response to a page-fault for at least one of the first local page or the second local page, retrieving the first local page, second local page, and parity page from the plurality of memory hosts; and

updating the contents of at least one of the first local page or the second local page; and

updating the parity page based at least in part on the first local page and the second local page; and

storing the first local page, second local page, and the parity page in the plurality of memory hosts.

13. The method implemented with the computer of claim 7 , wherein the third write request for the parity page to the third one of the plurality of memory hosts specifies that the parity page is to be stored on a disk of the third one of the plurality of memory hosts.

14. A system, comprising:

a computing device comprising a processor and a memory; and

machine-readable instructions stored in the memory that, when executed by the processor, cause the computing device to at least:

generate at least one parity page from at least a first local page and a second local page;

submit a first write request for the first local page to a first one of a plurality of memory hosts;

submit a second write request for the second local page to a second one of the plurality of memory hosts; and

submit a third write request for the parity page to a third one of the plurality of memory hosts.

15. The system of claim 14 , wherein the machine-readable instructions, when executed by the processor, further cause the computing device to at least:

detect that one of the plurality of memory hosts storing one of the first local page, second local page, or parity page has faulted;

retrieve a minimum number of remaining pages from the combination of the first local page, second local page, and parity page;

reconstruct a missing page or parity page from the minimum number of remaining pages;

select a new memory host to store the missing page or parity page; and

submit a fourth write request to the new memory host for the missing page or parity page.

16. The system of claim 14 , wherein the machine-readable instructions, when executed by the processor, further cause the computing device to communicate a heartbeat to the plurality of memory hosts.

17. The system of claim 14 , wherein the machine-readable instructions, when executed by the processor, further cause the computing device to at least record in a local chunk map the chunks in which the first local page, second local page, and parity page are stored and the offsets within the chunks in which the first local page, second local, page, and parity page are stored.

18. The system of claim 14 , wherein the machine-readable instructions, when executed by the processor, further causes the computing device to at least:

retrieve the first local page, the second local page, and the parity page from the plurality of memory hosts; and

free the first local page, the second local page, and the parity page in the memory.

19. The system of claim 14 , wherein the machine-readable instructions, when executed by the processor, further causes the computing device to at least:

in response to a page-fault for at least one of the first local page or the second local page, retrieve the first local page, second local page, and parity page from the plurality of memory hosts; and

update the contents of at least one of the first local page or the second local page; and

update the parity page based at least in part on the first local page and the second local page; and

store the first local page, second local page, and the parity page in the plurality of memory hosts.

20. The system of claim 14 , wherein the third write request for the parity page to the third one of the plurality of memory hosts specifies that the parity page is to be stored on a disk of the third one of the plurality of memory hosts.