IP Library Granted Patent US 11,704,030
Granted Patent B2
US 11,704,030 · App. 17/481,352 · Granted Jul 18, 2023

Resiliency and performance for cluster memory

Inventors: Marcos K. Aguilera (Mountain View, CA); Keerthi Kumar (Bangalore, IN); Pramod Kumar (Bangalore, IN); Pratap Subrahmanyam (Saratoga, CA); Sairam Veeraswamy (Coimbatore, IN); Rajesh Venkatasubramanian (Palo Alto, CA)
Assignee: VMWARE, INC.
G06F3/0631G06F3/0604G06F3/067G06F3/0659
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Quick Facts
Patent No.
US 11,704,030
App. No.
17/481,352
Granted
Jul 18, 2023
Kind
B2
Abstract

Disclosed are various embodiments for improving resiliency and performance of clustered memory. A computing device can acquire a chunk of byte-addressable memory from a cluster memory host. The computing device can then identify an active set of allocated memory pages and an inactive set of allocated memory pages for a process executing on the computing device. Next, the computing device can store the active set of allocated memory pages for the process in the memory of the computing device. Finally, the computing device can store the inactive set of allocated memory pages for the process in the chunk of byte-addressable memory of the cluster memory host.

Claims (65)

1. A system, comprising:

a computing device comprising a processor and a memory; and

machine-readable instructions stored in the memory that, when executed by the processor, cause the computing device to at least:

acquire a chunk of byte-addressable memory from a cluster memory host;

identify an active set of allocated memory pages and an inactive set of allocated memory pages for a process executing on the computing device;

store the active set of allocated memory pages for the process in the memory of the computing device;

store the inactive set of allocated memory pages for the process in the chunk of byte-addressable memory of the cluster memory host;

detect that a page has moved from the active set to the inactive set of allocated memory pages; and

in response to the page moving from the active set to the inactive set of allocated memory pages, remap the page from memory of the computing device to the chunk of byte-addressable memory of the cluster memory host.

2. The system of claim 1 , wherein the machine-readable instructions, when executed by the processor, further cause the computing device to at least:

detect that a page has moved from the inactive set to the active set of allocated memory pages; and

in response to the page moving from the inactive set to the active set of allocated memory pages, remap the page from the chunk of byte-addressable memory of the cluster memory host to the memory of the computing device.

3. The system of claim 1 , wherein the machine-readable instructions that detect that a page has moved from the active set to the inactive set of allocated memory pages further cause the computing device to at least:

clear an access bit in a page table at a beginning of a time period, the access bit being associated with the page; and

determine that the access bit remains unset at an end of the time period.

4. The system of claim 1 , wherein the machine-readable instructions that cause the computing device to acquire the chunk of byte-addressable memory from the cluster memory host further cause the computing device to:

identify the cluster memory host from a plurality of cluster memory hosts;

identify a free chunk of byte-addressable memory specified by an allocation structure maintained by the cluster memory host; and

perform an atomic compare-and-swap operation on the allocation structure to claim the free chunk of byte-addressable memory.

5. The system of claim 1 , wherein the machine-readable instructions that cause the computing device to acquire the chunk of byte-addressable memory from the cluster memory host further cause the computing device to:

send a request for the chunk of byte-addressable memory to a management host; and

receive a response from the management host, the response identifying the cluster memory host and the chunk of byte-addressable memory on the cluster memory host.

6. The system of claim 1 , wherein the machine-readable instructions, when executed by the processor, further cause the computing device to communicate a heartbeat to a management host or the cluster memory host.

7. A method implemented by a computer, comprising:

acquiring a chunk of byte-addressable memory from a cluster memory host by at least:

identifying the cluster memory host from a plurality of cluster memory hosts;

identifying a free chunk of byte-addressable memory specified by an allocation structure maintained by the cluster memory host; and

performing an atomic compare-and-swap operation on the allocation structure to claim the free chunk of byte-addressable memory;

identifying an active set of allocated memory pages and an inactive set of allocated memory pages for a process executing on the computer;

storing the active set of allocated memory pages for the process in a memory of computer; and

storing the inactive set of allocated memory pages for the process in the chunk of byte-addressable memory of the cluster memory host.

8. The method implemented by the computer of claim 7 , further comprising:

detecting that a page has moved from the inactive set to the active set of allocated memory pages; and

in response to the page moving from the inactive set to the active set of allocated memory pages, remapping the page from the chunk of byte-addressable memory of the cluster memory host to the memory of the computer.

9. The method implemented by the computer of claim 7 , further comprising:

detecting that a page has moved from the active set to the inactive set of allocated memory pages; and

in response to the page moving from the active set to the inactive set of allocated memory pages, remapping the page from memory of the computer to the chunk of byte-addressable memory of the cluster memory host.

10. The method implemented by the computer of claim 9 , wherein detecting that a page as moved from the active set to the inactive set of allocated memory pages further comprises:

clearing an access bit in a page table at a beginning of a time period, the access bit being associated with the page; and

determining that the access bit remains unset at an end of the time period.

11. The method implemented by the computer of claim 7 , wherein acquiring the chunk of byte-addressable memory from the cluster memory host further comprises:

sending a request for the chunk of byte-addressable memory to a management host; and

receiving a response from the management host, the response identifying the cluster memory host and the chunk of byte-addressable memory on the cluster memory host.

12. The method implemented by the computer of claim 7 , further comprising communicating a heartbeat to a management host or the cluster memory host.

13. A non-transitory, computer-readable medium, comprising machine-readable instructions that, when executed by a processor of a computing device, cause the computing device to at least:

acquire a chunk of byte-addressable memory from a cluster memory host by causing the computing device to at least:

send a request for the chunk of byte-addressable memory to a management host; and

receive a response from the management host, the response identifying the cluster memory host and the chunk of byte-addressable memory on the cluster memory host;

identify an active set of allocated memory pages and an inactive set of allocated memory pages for a process executing on the computing device;

store the active set of allocated memory pages for the process in a memory of the computing device; and

store the inactive set of allocated memory pages for the process in the chunk of byte-addressable memory of the cluster memory host.

14. The non-transitory, computer-readable medium of claim 13 , wherein the machine-readable instructions, when executed by the processor, further cause the computing device to at least:

detect that a page has moved from the inactive set to the active set of allocated memory pages; and

in response to the page moving from the inactive set to the active set of allocated memory pages, remap the page from the chunk of byte-addressable memory of the cluster memory host to the memory of the computing device.

15. The non-transitory, computer-readable medium of claim 13 , wherein the machine-readable instructions, when executed by the processor, further cause the computing device to at least:

detect that a page has moved from the active set to the inactive set of allocated memory pages; and

in response to the page moving from the active set to the inactive set of allocated memory pages, remap the page from memory of the computing device to the chunk of byte-addressable memory of the cluster memory host.

16. The non-transitory, computer-readable medium of claim 15 , wherein the machine-readable instructions that detect that a page has moved from the active set to the inactive set of allocated memory pages further cause the computing device to at least:

clear an access bit in a page table at a beginning of a time period, the access bit being associated with the page; and

determine that the access bit remains unset at an end of the time period.

17. The non-transitory, computer-readable medium of claim 13 , wherein the machine-readable instructions that cause the computing device to acquire the chunk of byte-addressable memory from the cluster memory host further cause the computing device to:

identify the cluster memory host from a plurality of cluster memory hosts;

identify a free chunk of byte-addressable memory specified by an allocation structure maintained by the cluster memory host; and

perform an atomic compare-and-swap operation on the allocation structure to claim the free chunk of byte-addressable memory.

18. The non-transitory, computer-readable medium of claim 13 , wherein the machine-readable instructions, when executed by the processor, further cause the computing device to communicate a heartbeat to a management host or the cluster memory host.

Assignments (2)
CHANGE OF NAME Recorded Apr 15, 2024
From: VMWARE, INC.
To: VMWARE LLC
Reel/Frame 067102/0395 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2021
From: AGUILERA, MARCOS K.; KUMAR, KEERTHI; KUMAR, PRAMOD; SUBRAHMANYAM, PRATAP; VEERASWAMY, SAIRAM; VENKATASUBRAMANIAN, RAJESH
To: VMWARE, INC.
Reel/Frame 057555/0185 →
Priority Claims (1)
IN 202141032017 · Jul 16, 2021 · national
Continuity (1)
Related Publication 20230021067A1 · Jan 19, 2023