IP Library Granted Patent US 12,224,722
Granted Patent B2
US 12,224,722 · App. 17/509,925 · Granted Feb 11, 2025

Methods and apparatus for supporting linearization on power combined power amplifiers

Inventors: Kang Ning (Lawrence, NJ); Harish Krishnaswamy (New York, NY)
Assignee: Mixcomm, Inc.
H03F3/245H03F1/565H03F2200/543H03F2203/21142
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,224,722
App. No.
17/509,925
Granted
Feb 11, 2025
Kind
B2
Abstract

Methods and apparatus for implementing a power amplifier circuit assembly an uneven power splitter which feeds two power amplifiers of different amplifier classes are described. By supplying different amounts of power to different amplifier circuits having different performance curves, an overall combined amplifier performance having a relatively uniform, e.g., flat, performance curve over a wide range of frequencies is achieved. In at least some embodiments one of the amplifiers is a class B power amplifier and the other amplifier is a class C power amplifier. In some but not necessarily all embodiments a phase shift is introduced on a signal path to one of the power amplifiers to compensate for a difference in phase shifts introduced by the power amplifiers which are used in parallel.

Claims (29)

1. A power amplifier circuit assembly comprising:

an uneven power splitter including a power splitter signal input for receiving a signal to be amplified, a first power splitter output and a second power splitter output, said uneven power splitter providing different amounts of power from an input signal received at said power splitter signal input to said first and second power splitter outputs;

a first power amplifier having a first power amplifier input and a first power amplifier output, the first power amplifier input being coupled to the first power splitter output; and

a second power amplifier, having a second power amplifier input, coupled to the second power splitter output, and a second power amplifier output, said first power amplifier output and the second power amplifier output being coupled to each other and to a signal output of the power amplifier circuit assembly, said second power amplifier being a different class amplifier than said first power amplifier;

wherein the uneven power splitter includes a first transmission path and a second transmission path, said first transmission path including a first impedance, said second transmission path including a second impedance, said first transmission path coupling the power splitter signal input to the first power splitter output, said second transmission path coupling the power splitter signal input to the second power splitter output, the first and second impedances being different; and

wherein one of said first and second transmission paths includes a phase delay element not included in the other one of said first and second transmission paths.

2. The power amplifier circuit assembly of claim 1 ,

wherein the first impedance is a first transmission line impedance; and

wherein the second impedance is a second transmission line impedance.

3. The power amplifier circuit assembly of claim 1 ,

wherein said first transmission path is implemented using one or more of: i) a capacitor, ii) a resistor, or iii) an inductor; and

wherein said second transmission path is implemented using one or more of: i) a capacitor, ii) a resistor, or iii) an inductor.

4. The power amplifier circuit assembly of claim 1 , wherein said first power amplifier is a class-B power amplifier and said second power amplifier is a class-C power amplifier.

5. The power amplifier circuit assembly of claim 4 , wherein the first impedance is lower than said second impedance.

6. The power amplifier circuit assembly of claim 4 , wherein the second impedance is lower than said first impedance.

7. The power amplifier circuit assembly of claim 1 , wherein the uneven power splitter further includes:

a resistor bridging the first and second transmission paths.

8. The power amplifier circuit of claim 1 , wherein said phase delay element is a transmission line.

9. The power amplifier circuit of claim 1 , wherein said phase delay element is implemented using one or more of: i) a capacitor, ii) a resistor or iii) an inductor.

10. The power amplifier circuit assembly of claim 1 , wherein the phase delay element balances a phase difference introduced between the first and second power amplifiers due to a difference in amplifier size and biasing between the first and second power amplifiers.

11. The power amplifier circuit assembly of claim 1 , further comprising:

a power amplifier circuit assembly input for receiving an input signal; and

a signal driver coupling the power amplifier circuit assembly input to the power splitter signal input, the signal driver including an amplifier for amplifying the input signal prior to it being supplied to the power splitter signal input of the uneven power splitter.

12. The power amplifier circuit assembly of claim 11 , wherein the output impedance of the signal driver is different than the input impedance of at least one of the first and second power amplifiers.

13. The power amplifier circuit assembly of claim 1 , wherein the overall gain from the input of uneven power spitter to the signal output of the power amplifier circuit assembly is flat.

14. The power amplifier circuit assembly of claim 1 , wherein the uneven power splitter is wideband.

15. The power amplifier circuit assembly of claim 1 , wherein wideband is intended to mean above 5% fractional bandwidth.

16. The power amplifier circuit assembly of claim 1 , wherein said power amplifier circuit assembly amplifies signals in the microwave range of 1 GHz to 220 GHz.

17. The power amplifier circuit assembly of claim 1 , wherein said power amplifier circuit assembly is part of a large antenna array assembly.

Assignments (3)
SECURITY INTEREST Recorded Mar 5, 2026
From: SIVERS SEMICONDUCTORS, INC.
To: BOOTSTRAP EUROPE 4.0 SARL
Reel/Frame 073985/0194 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2023
From: KRISHNASWAMY, HARISH
To: MIXCOMM, INC.
Reel/Frame 062952/0296 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 8, 2021
From: NING, KANG
To: MIXCOMM, INC.
Reel/Frame 058050/0501 →
Continuity (2)
Provisional Application 63106284 · Oct 27, 2020
Related Publication 20220131509A1 · Apr 28, 2022
References Cited (20)
US 6054906A · Kim · 2000 [cited by applicant]
US 9413309B1 · Zhao et al. · 2016 [cited by applicant]
US 20160164553A1 · Kurihara · 2016 [cited by applicant]
US 20170019847A1 · Han et al. · 2017 [cited by applicant]
US 20180006611A1 · de Jong et al. · 2018 [cited by applicant]
US 20180034419A1 · Moronval · 2018 [cited by applicant]
US 20180294777A1 · Yang et al. · 2018 [cited by applicant]
WO 2020166629A1 · 2020 [cited by applicant]
Z. Zong et al., “A 28GHZ Voltage-Combined Doherty Power Amplifier with a Compact Transformer-based Output Combiner in 22nm FD-SOI,” 2020 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Los Angeles, CA, USA, 2… [cited by applicant]
J. Tsai and T. Huang, “A 38-46 GHz MMIC Doherty Power Amplifier Using Post-Distortion Linearization,” in IEEE Microwave and Wireless Components Letters, vol. 17, No. 5, pp. 388-390, May 2007, doi: 10.1109/LMWC.2007.8957… [cited by applicant]
B. Wicks, E. Skafidas and R. Evans, “A 60-GHz fully-integrated Doherty power amplifier based on 0.13-μm CMOS process,” 2008 IEEE Radio Frequency Integrated Circuits Symposium, Atlanta, GA, 2008, pp. 69-72, doi: 10.1109/… [cited by applicant]
E. Kaymaksut, D. Zhao and P. Reynaert, “Transformer-Based Doherty Power Amplifiers for mm-Wave Applications in 40-nm CMOS,” in IEEE Transactions on Microwave Theory and Techniques, vol. 63, No. 4, pp. 1186-1192, Apr. 20… [cited by applicant]
M. Özen, N. Rostomyan, K. Aufinger and C. Fager, “Efficient Millimeter Wave Doherty PA Design Based on a Low-Loss Combiner Synthesis Technique,” in IEEE Microwave and Wireless Components Letters, vol. 27, No. 12, pp. 11… [cited by applicant]
M. Tanio, K. Ning and J. F. Buckwalter, “A 60-GHz Symmetric Doherty Power Amplifier with 20.4% 6-dB Back-off Efficiency,” 2019 49th European Microwave Conference (EuMC), Paris, France, 2019, pp. 559-562, doi: 10.23919/E… [cited by applicant]
A. Agah, H. Dabag, B. Hanafi, P. M. Asbeck, J. F. Buckwalter and L. E. Larson, “Active Millimeter-Wave Phase-Shift Doherty Power Amplifier in 45-nm SOI CMOS,” in IEEE Journal of Solid-State Circuits, vol. 48, No. 10, pp… [cited by applicant]
H. T. Nguyen, T. Chi, S. Li and H. Wang, “A Linear High-Efficiency Millimeter-Wave CMOS Doherty Radiator Leveraging Multi-Feed On-Antenna Active Load Modulation,” in IEEE Journal of Solid-State Circuits, vol. 53, No. 12… [cited by applicant]
W. Hallberg, M. Özen, D. Gustafsson, K. Buisman and C. Fager, “A Doherty Power Amplifier Design Method for Improved Efficiency and Linearity,” in IEEE Transactions on Microwave Theory and Techniques, vol. 64, No. 12, pp… [cited by applicant]
Rostomyan Narek et al: A Ka-Band Asymmetric Dual Input CMOS SOI Doherty Power Amplifier with 25 dBm Output Power and High Back-Off Efficiency, 2019 IEEE Topical Conference on RF/Microwave Power Amplifiers for Radio and … [cited by applicant]
Rostomyan Narek et al: 28 GHz Doherty Power Amplifier in CMOS SOI With 28% Back-Off PAE, IEEE Microwave and Wireless Components Letters, IEEE Service Center, New York, NY, US, vol. 28, No. 5, May 1, 2018, pp. 446-448. [cited by applicant]
International Search Report and Written Opinion of the International Searching Authority from PCT/US2021/056660, mail date Jan. 21, 2022, 1-9 pages. [cited by applicant]