SEMICONDUCTOR DEVICE WITH REFERENCE VOLTAGE CIRCUIT
Provided is a semiconductor device with a reference voltage circuit including an enhancement type transistor having P-type polycrystalline silicon as a first gate electrode, and a depletion type transistor having N-type polycrystalline silicon as a second gate electrode, in which the enhancement type transistor has an impermeable film that is locally provided to cover the first gate electrode via an interlayer insulating film disposed on the first gate electrode, and a nitride film that has an opening portion which is provided larger than the first gate electrode and smaller than the impermeable film, and is provided to cover a periphery of the impermeable film, and the depletion type transistor has a nitride film that is directly provided on an interlayer insulating film disposed on the second gate electrode and covers the depletion type transistor without a gap.
1 . A semiconductor device with a reference voltage circuit comprising:
an enhancement type MOS transistor having a first channel region including a first channel length direction and a first channel width direction, and polycrystalline silicon having P-type conductivity that covers the first channel region and serves as a first gate electrode; and
a depletion type MOS transistor having a second channel region including a second channel length direction and a second channel width direction, and polycrystalline silicon having N-type conductivity that covers the second channel region and serves as a second gate electrode,
wherein the enhancement type MOS transistor has
an impermeable film that is locally provided to cover the first gate electrode via an interlayer insulating film disposed on the first gate electrode, and
a nitride film that has an opening portion which includes the first gate electrode in a plan view and is provided smaller than the impermeable film, and is provided to cover a periphery of the impermeable film, and
the depletion type MOS transistor has a nitride film that is directly provided on an interlayer insulating film disposed on the second gate electrode and covers the depletion type MOS transistor without a gap in a plan view.
2 . The semiconductor device with a reference voltage circuit according to claim 1 ,
wherein the impermeable film is an uppermost wiring layer.
3 . The semiconductor device with a reference voltage circuit according to claim 1 ,
wherein the impermeable film is amorphous silicon.
4 . The semiconductor device with a reference voltage circuit according to claim 1 , further comprising:
a polyimide film covering a final protective film,
wherein the polyimide film covers, without a gap, the opening portion that is provided in the final protective film and located on a surface of the impermeable film.
5 . The semiconductor device with a reference voltage circuit according to claim 1 , further comprising:
an oxide film having a corrosion resistance that covers a surface of the impermeable film without a gap.
6 . The semiconductor device with a reference voltage circuit according to claim 1 ,
wherein the opening portion is longer than a first channel width in the first channel width direction and shorter than a first channel length in the first channel length direction.
7 . The semiconductor device with a reference voltage circuit according to claim 6 ,
wherein the impermeable film is an uppermost wiring layer.
8 . The semiconductor device with a reference voltage circuit according to claim 6 ,
wherein the impermeable film is amorphous silicon.
9 . The semiconductor device with a reference voltage circuit according to claim 6 , further comprising:
a polyimide film covering a final protective film,
wherein the polyimide film covers, without a gap, the opening portion that is provided in the final protective film and located on a surface of the impermeable film.
10 . The semiconductor device with a reference voltage circuit according to claim 6 , further comprising:
an oxide film having a corrosion resistance that covers a surface of the impermeable film without a gap.
11 . A semiconductor device with a reference voltage circuit comprising:
an enhancement type MOS transistor having polycrystalline silicon of P-type conductivity, as a first gate electrode; and
a depletion type MOS transistor having polycrystalline silicon of N-type conductivity, as a second gate electrode,
wherein the enhancement type MOS transistor has
an impermeable film that is locally provided so as to cover the first gate electrode via an interlayer insulating film disposed on the first gate electrode, and
a nitride film that has an opening portion which is provided larger than the first gate electrode in a plan view and smaller than the impermeable film, and is provided so as to cover a periphery of the impermeable film, and
the depletion type MOS transistor has a nitride film that is directly provided on an interlayer insulating film disposed on the second gate electrode and covers the depletion type MOS transistor without a gap in a plan view.
12 . The semiconductor device with a reference voltage circuit according to claim 11 ,
wherein the impermeable film is an uppermost wiring layer.
13 . The semiconductor device with a reference voltage circuit according to claim 11 ,
wherein the impermeable film is amorphous silicon.
14 . The semiconductor device with a reference voltage circuit according to claim 11 , further comprising:
a polyimide film covering a final protective film,
wherein the polyimide film covers, without a gap, the opening portion that is provided in the final protective film and located on a surface of the impermeable film.
15 . The semiconductor device with a reference voltage circuit according to claim 11 , further comprising:
an oxide film having a corrosion resistance that covers a surface of the impermeable film without a gap.