IP Library Granted Patent US 11,854,629
Granted Patent B2
US 11,854,629 · App. 17/532,905 · Granted Dec 26, 2023

System and method for non-parametric optimal read threshold estimation using deep neural network

Inventors: Fan Zhang (Fremont, CA); Aman Bhatia (Los Gatos, CA); Haobo Wang (San Jose, CA)
Assignee: SK hynix Inc.
G11C16/3404G06F18/214G06N3/063G11C16/102G11C16/14G11C16/26
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Quick Facts
Patent No.
US 11,854,629
App. No.
17/532,905
Granted
Dec 26, 2023
Kind
B2
Abstract

A scheme for non-parametric optimal read threshold estimation of a memory system. The memory system includes a memory device including pages and a controller including a neural network. The controller performs read operations on a selected page using a read threshold set; obtain the read threshold set, a checksum value and an asymmetric ratio of ones count and zeros count which are associated with decoding of the selected page according to each of the read operations; provide the obtained read threshold set, the checksum value and the asymmetric ratio as input information to the neural network; and estimate, by the neural network, an optimal read threshold voltage based on the input information and weights including a combination of multiple matrices and bias vectors.

Claims (32)

1. A memory system comprising:

a memory device including a plurality of pages; and

a controller including a neural network and configured to:

perform one or more read operations on a page selected from among the plurality of pages using a read threshold set including a plurality of read threshold voltages;

obtain the read threshold set, a checksum value and an asymmetric ratio of ones count and zeros count which are associated with decoding of the selected page according to each of the read operations;

provide the obtained read threshold set, the checksum value and the asymmetric ratio as input information to the neural network; and

estimate, by the neural network, an optimal read threshold voltage based on the input information and weights for the input information, the weights including a combination of multiple matrices and bias vectors.

2. The memory system of claim 1 , wherein the neural network is trained to obtain the weights such that a set loss function is minimized.

3. The memory system of claim 2 , wherein the set loss function includes a differentiable loss function to measure respective errors between outputs of the neural network and the optimal read threshold voltage.

4. The memory system of claim 1 , wherein the controller estimates the optimal read threshold voltage based on a combination of the input information, the multiple matrices, the bias vectors and an activation function.

5. The memory system of claim 4 , wherein the controller estimates the optimal read threshold voltage based on equation:

Opt Vt=A DNN,N ×R ( A DNN,N-1 ×R ( A DNN,N-2 ×R ( . . . R ( A DNN,0 ×[Vt,CS,AR]+b DNN,0 ) . . . )+ b DNN,N-2 )+ b DNN,N-1 )+ b DNN,N ,

where OptVt represents the optimal read threshold voltage, Vt represents the read threshold set, CS represents the checksum values, AR represents the asymmetric ratio of ones count and zeros count, A DNN,N represents a (N+1)th matrix, b DNN,N represents a (N+1)th bias vector, and R represents the activation function.

6. The memory system of claim 5 , wherein the asymmetric ratio of ones count and zeros count includes a ratio of the ones count divided by the zeros count.

7. The memory system of claim 4 , wherein the activation function includes a rectified linear unit (ReLU) activation function.

8. The memory system of claim 1 , wherein the selected page includes a least significant bit (LSB) page of a triple level cell (TLC).

9. The memory system of claim 8 , wherein the read threshold voltage set includes a) a first read threshold voltage for distinguishing an erased state from a first program state and b) a second read threshold voltage for distinguishing a second program state from a third program state.

10. A method for operating a memory system having a memory device including a plurality of pages and a controller including a neural network, the method comprising:

performing one or more read operations on a page selected from among the plurality of pages using a read threshold set including a plurality of read threshold voltages;

obtaining the read threshold set, a checksum value and an asymmetric ratio of ones count and zeros count which are associated with decoding of the selected page according to each of the read operations;

providing the obtained read threshold set, the checksum value and the asymmetric ratio as input information to the neural network; and

estimating, by the neural network, an optimal read threshold voltage based on the input information and weights for the input information, the weights including a combination of multiple matrices and bias vectors.

11. The method of claim 10 , wherein the neural network is trained to obtain the weights such that a set loss function is minimized.

12. The method of claim 11 , wherein the set loss function includes a differentiable loss function to measure respective errors between outputs of the neural network and the optimal read threshold voltage.

13. The method of claim 10 , wherein the controller estimates the optimal read threshold voltage based on a combination of the input information, the multiple matrices, the bias vectors and an activation function.

14. The method of claim 13 , wherein the controller estimates the optimal read threshold voltage based on equation:

Opt Vt=A DNN,N ×R ( A DNN,N-1 ×R ( A DNN,N-2 ×R ( . . . R ( A DNN,0 ×[Vt,CS,AR]+b DNN,0 ) . . . )+ b DNN,N-2 )+ b DNN,N-1 )+ b DNN,N ,

where OptVt represents the optimal read threshold voltage, Vt represents the read threshold set, CS represents the checksum values, AR represents the asymmetric ratio of ones count and zeros count, A DNN,N represents a (N+1)th matrix, b DNN,N represents a (N+1)th bias vector, and R represents the activation function.

15. The method of claim 14 , wherein the asymmetric ratio of ones count and zeros count includes a ratio of the ones count divided by the zeros count.

16. The method of claim 13 , wherein the activation function includes a rectified linear unit (ReLU) activation function.

17. The method of claim 10 , wherein the selected page includes a least significant bit (LSB) page of a triple level cell (TLC).

18. The method of claim 17 , wherein the read threshold voltage set includes a) a first read threshold voltage for distinguishing an erased state from a first program state and b) a second read threshold voltage for distinguishing a second program state from a third program state.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 3, 2022
From: SK HYNIX MEMORY SOLUTIONS AMERICA INC.
To: SK HYNIX INC.
Reel/Frame 060100/0882 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 22, 2021
From: ZHANG, FAN; BHATIA, AMAN; WANG, HAOBO
To: SK HYNIX MEMORY SOLUTIONS AMERICA INC.
Reel/Frame 058186/0714 →
Continuity (1)
Related Publication 20230162803A1 · May 25, 2023
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