IP Library Granted Patent US 11,914,897
Granted Patent B2
US 11,914,897 · App. 17/540,546 · Granted Feb 27, 2024

Arbitration techniques for managed memory

Inventor: David Aaron Palmer (Boise, ID)
Assignee: Micron Technology, Inc.
G06F3/0659G06F3/0604G06F3/0656G06F3/0679
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Quick Facts
Patent No.
US 11,914,897
App. No.
17/540,546
Granted
Feb 27, 2024
Kind
B2
Abstract

Devices and techniques for arbitrating operation of memory devices in a managed NAND memory system to conform the operation to a power budget. In an example, a method can include enabling a subset of memory die of a memory system having multiple memory die, starting an active timer for each active memory die, initializing execution of a buffered memory command at each active die based on a timestamp associated with the buffered memory command, and disabling a first memory die of the subset of memory die when the active timer for the first die expires to maintain compliance with a power budget of the memory system.

Claims (63)

1. A memory system comprising:

a controller configured to:

receive a first memory request for a first die of multiple memory die of the memory system;

determine that the first die is disabled;

responsive to a determination that the first die is disabled, store the first memory request into a first queue and record a timestamp that identifies a time at which the first memory request was added to the first queue;

determine, based upon the timestamp, that the first memory request has been in the first queue more than a specified threshold duration;

responsive to a determination that the first memory request has been in the first queue more than the specified threshold amount of time, disable a second die in the multiple memory die, the second die an enabled die that is a longest enabled die in the multiple memory die; and

responsive to disabling the second die, enable the first die, and process the first memory request on the first die.

2. The memory system of claim 1 , wherein the controller is configured to disable the second die by switching the second die to a low power mode.

3. The memory system of claim 1 , wherein the controller is further configured to:

set an enable timer for the first die upon enabling the first die;

subsequent to execution of the first memory request, execute additional requests in the first queue for the first die until the enable timer expires; and

upon expiry of the enable timer, disable the first die and enable another one of the multiple die.

4. The memory system of claim 1 , wherein the controller is configured to disable the second die by de-energizing the second die.

5. The memory system of claim 1 , wherein the controller is further configured to:

process the first memory request on the first die by being configured to:

split the first memory request into a first set of first multiple components;

split a second memory request for a third die into a second set of second multiple components, each component of the first and second sets having a corresponding power consumption;

selecting a first component of the first set and a second component of the second set such that a sum of the corresponding power consumption of the first and second components is below a power budget; and

executing the first component and the second component in parallel.

6. The memory system of claim 5 , wherein the first memory request is a read operation and the first set of first multiple components comprises a sense component and a read transfer component.

7. The memory system of claim 5 , wherein the first memory request is a write operation and the first set of first multiple components comprises a write transfer component and a program component.

8. A method comprising:

receiving a first memory request for a first die of multiple memory die of a memory system;

determining that the first die is disabled;

responsive to a determination that the first die is disabled, storing the first memory request into a first queue and record a timestamp that identifies a time at which the first memory request was added to the first queue;

determining, based upon the timestamp, that the first memory request has been in the first queue more than a specified threshold duration;

responsive to a determination that the first memory request has been in the first queue more than the specified threshold amount of time, disabling a second die in the multiple memory die, the second die an enabled die that is a longest enabled die in the multiple memory die; and

responsive to disabling the second die, enabling the first die, and process the first memory request on the first die.

9. The method of claim 8 , wherein the method further comprises disabling the second die by switching the second die to a low power mode.

10. The method of claim 8 , wherein the method further comprises:

setting an enable timer for the first die upon enabling the first die;

subsequent to execution of the first memory request, executing additional requests in the first queue for the first die until the enable timer expires; and

upon expiry of the enable timer, disabling the first die and enable another one of the multiple die.

11. The method of claim 8 , wherein the method further comprises disabling the second die by de-energizing the second die.

12. The method of claim 8 , wherein the method further comprises:

processing the first memory request on the first die by:

splitting the first memory request into a first set of first multiple components;

splitting a second memory request for a third die into a second set of second multiple components, each component of the first and second sets having a corresponding power consumption;

selecting a first component of the first set and a second component of the second set such that a sum of the corresponding power consumption of the first and second components is below a power budget; and

executing the first component and the second component in parallel.

13. The method of claim 12 , wherein the first memory request is a read operation and the first set of first multiple components comprises a sense component and a read transfer component.

14. The method of claim 12 , wherein the first memory request is a write operation and the first set of first multiple components comprises a write transfer component and a program component.

15. A non-transitory machine-readable medium, storing instructions, which when executed by a machine, causes the machine to perform operations comprising:

receiving a first memory request for a first die of multiple memory die of a memory system;

determining that the first die is disabled;

responsive to a determination that the first die is disabled, storing the first memory request into a first queue and record a timestamp that identifies a time at which the first memory request was added to the first queue;

determining, based upon the timestamp, that the first memory request has been in the first queue more than a specified threshold duration;

responsive to a determination that the first memory request has been in the first queue more than the specified threshold amount of time, disabling a second die in the multiple memory die, the second die an enabled die that is a longest enabled die in the multiple memory die; and

responsive to disabling the second die, enabling the first die, and process the first memory request on the first die.

16. The non-transitory machine-readable medium of claim 15 , wherein the operations further comprise disabling the second die by switching the second die to a low power mode.

17. The non-transitory machine-readable medium of claim 15 , wherein the operations further comprise:

setting an enable timer for the first die upon enabling the first die;

subsequent to execution of the first memory request, executing additional requests in the first queue for the first die until the enable timer expires; and

upon expiry of the enable timer, disabling the first die and enable another one of the multiple die.

18. The non-transitory machine-readable medium of claim 15 , wherein the operations further comprise disabling the second die by de-energizing the second die.

19. The non-transitory machine-readable medium of claim 15 , wherein the operations further comprise:

processing the first memory request on the first die by:

splitting the first memory request into a first set of first multiple components;

splitting a second memory request for a third die into a second set of second multiple components, each component of the first and second sets having a corresponding power consumption;

selecting a first component of the first set and a second component of the second set such that a sum of the corresponding power consumption of the first and second components is below a power budget; and

executing the first component and the second component in parallel.

20. The non-transitory machine-readable medium of claim 19 , wherein the first memory request is a read operation and the first set of first multiple components comprises a sense component and a read transfer component.

Continuity (3)
Continuation 16293227 · Mar 5, 2019
Provisional Application 62786764 · Dec 31, 2018
Related Publication 20220091788A1 · Mar 24, 2022