Streaming execution for a quantum processing system
Interactions between a classical computing system and a quantum computing system can be structured to increase the effective memory available to hold instructions for a quantum processor. The system stores a schedule of compiled quantum processing instructions in a memory storage location on a classical computing system. A small program memory is included in close proximity to a control system for the quantum processor on the quantum computing system. The classical computing system sends a subset of instructions from the schedule of quantum instructions to the program memory. The control system manages execution of the instructions by accessing them at the program memory and configuring the quantum processor accordingly. While the quantum processor executes the instructions, additional instructions are transferred from the classical computing system to the program memory to await execution. The quantum system can execute many instructions quickly without idling while instructions are fetched from a large memory.
1. A quantum cloud system comprising:
a first memory configured to store quantum program instructions;
one or more classical processing system processors configured to execute classical program instructions stored by the first memory;
one or more quantum processing system processors configured to execute quantum program instructions stored by the first memory; and
a controller configured to:
allocate quantum instructions stored by the first memory to a second memory for intermediate storage;
allocate the quantum instructions stored at the second memory to the one or more quantum processing system processors for execution; and
request additional quantum instructions from the first memory; and
an output configured to output a result of executing the quantum program instructions stored by the first memory.
2. The quantum cloud system of claim 1 , wherein the quantum program instructions are received by the first memory from a client device that is connected to the first memory via a low latency connection.
3. The quantum cloud system of claim 1 , wherein the first memory is connected to the second memory via a low latency connection.
4. The quantum cloud system of claim 1 wherein the controller is configured to identify a next set of instructions stored by the first memory based on an instruction schedule and wherein the first memory is connected to the second memory via a low latency connection such that the second memory receives the next set of instructions within a range of 1-50 μs.
5. The quantum cloud system of claim 1 , wherein the second memory comprises one of: a field programmable gate array (FPGA), or an application-specific integrated circuit (ASIC).
6. The quantum cloud system of claim 1 , wherein the controller is further configured to allocate quantum instructions within the next set of instructions to the second memory such that the next set of instructions overwrite previously executed instructions also stored in the second memory.
7. The quantum cloud system of claim 1 , wherein the second memory is configured in one of: a ring buffer format or a double buffer format.
8. The quantum cloud system of claim 1 , wherein the controller is configured to:
allocate quantum instructions within the next set of instructions to a second memory for intermediate storage; and
allocate the quantum instructions stored at the second memory to the one or more quantum processing system processors for execution;
such that the allocations occur concurrently.
9. The quantum cloud system of claim 1 , wherein the second memory is physically closer to the one or more quantum processors than the first memory.
10. The quantum cloud system of claim 1 , wherein the controller is configured to communicate with the second memory via one of an electrical or optical communication path, wherein the length of the electrical or optical communication path is less than 4.5 meters.
11. A method comprising:
on a quantum cloud computing system comprising:
a first memory configured to store quantum program instructions;
one or more classical processing system processors configured to execute classical program instructions stored by the first memory;
one or more quantum processing system processors configured to execute quantum program instructions stored by the first memory; and
a controller;
allocating, by the controller, quantum instructions stored by the first memory to a second memory for intermediate storage;
allocating, by the controller, the quantum instructions stored at the second memory to the one or more quantum processing system processors for execution;
requesting, by the controller, additional quantum instructions from the first memory; and
executing the quantum program instructions stored by the first memory.
12. The method of claim 11 , wherein the quantum program instructions are received by the first memory from a client device that is connected to the first memory via a low latency connection.
13. The method of claim 11 , wherein the first memory is connected to the second memory via a low latency connection.
14. The method of claim 11 , further comprising identifying, by the controller, a next set of instructions stored by the first memory based on an instruction schedule, wherein the first memory is connected to the second memory via a low latency connection such that the second memory receives the next set of instructions within a range of 1-50 μs.
15. The method of claim 11 , wherein the second memory comprises one of: a field programmable gate array (FPGA), or an application-specific integrated circuit (ASIC).
16. The method of claim 11 , further comprising allocating, by the controller, quantum instructions within the next set of instructions to the second memory such that the next set of instructions overwrite previously executed instructions also stored in the second memory.
17. The method of claim 11 , wherein the second memory is configured in one of: a ring buffer format or a double buffer format.
18. The method of claim 11 , further comprising:
allocating, by the controller, quantum instructions within the next set of instructions to a second memory for intermediate storage; and
allocating, by the controller the quantum instructions stored at the second memory to the one or more quantum processing system processors for execution;
such that the allocations occur concurrently.
19. The method of claim 11 , wherein the second memory is physically closer to the one or more quantum processors than the first memory.
20. The method of claim 11 , further comprising communicating, by the controller, with the second memory via one of an electrical or optical communication path, wherein the length of the electrical or optical communication path is less than 4.5 meters.