IP Library Granted Patent US 11,615,953
Granted Patent B2
US 11,615,953 · App. 17/542,303 · Granted Mar 28, 2023

Silicon carbide semiconductor device with a contact region having edges recessed from edges of the well region

Inventors: Amaury Gendron-Hansen (Bend, OR); Bruce Odekirk (Bend, OR)
Assignee: Microchip Technology Inc.
H01L21/02378H01L21/02274H01L21/02293H01L21/02579H01L21/0465H01L21/0475H01L21/67075H01L27/0927
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Quick Facts
Patent No.
US 11,615,953
App. No.
17/542,303
Granted
Mar 28, 2023
Kind
B2
Abstract

A silicon carbide semiconductor device includes a silicon carbide (SiC) substrate having a SiC epitaxial layer disposed over a surface of the SiC substrate, the SiC substrate having a first conductivity and the SiC epitaxial layer having the first conductivity. A contact region and a well region are formed in the SiC epitaxial layer, the contact region and the well region have a doping level of a second conductivity opposite the first conductivity. The contact region lies completely within the well region, is not in contact with a region having the first conductivity and has edges recessed from edges of the well region.

Claims (14)

1. A silicon carbide semiconductor device comprising:

a silicon carbide (SiC) substrate having a SiC epitaxial layer disposed over a surface of the SiC substrate, the SiC substrate having a first conductivity and the SiC epitaxial layer having the first conductivity; and

a contact region and a well region formed in the SiC epitaxial layer, the contact region and the well region having a respective doping level of a second conductivity opposite the first conductivity, wherein the contact region lies completely within the well region, is not in contact with a region having the first conductivity, and has bottom and side edges in contact with the well region and recessed from edges of the well region.

2. The silicon carbide semiconductor device of claim 1 wherein the well region comprises a p-well region and the contact region comprises a p-type region.

3. The silicon carbide semiconductor device of claim 1 wherein the well region comprises an Al implant.

4. The silicon carbide semiconductor device of claim 1 wherein the respective doping level of the contact region comprises an Al implant having an implant dose of from 1E14 to 1E16 atoms/cm 2 .

5. A semiconductor structure comprising:

a SiC substrate having a first conductivity;

a SiC epitaxial layer having the first conductivity disposed over the SiC substrate;

a well region disposed in the SiC epitaxial layer, the well region having a doping level of a second conductivity opposite the first conductivity and forming a pn junction with the SiC epitaxial layer;

a contact region having the second conductivity disposed in the well region, the contact region having a doping level higher than the doping level of the first conductivity, the contact region not in contact with a region having the first conductivity, having bottom and side edges in contact with the well region and recessed in from edges of the well region; and

wherein crystal defect damage sites created during formation of the contact region and the well region are separated from a depletion region associated with the pn junction between the well region and the SiC epitaxial layer when the pn junction is reverse biased.

6. The silicon carbide semiconductor device of claim 5 wherein the doping level of the contact region has an implant dose of from 1E14 to 1E16 atoms/cm 2 and the doping level of the well region has an implant dose of from 5E13 to 1E15 atoms/cm 2 .

7. The silicon carbide semiconductor device of claim 1 wherein the doping level of the contact region has an implant dose of from 1E14 to 1E16 atoms/cm 2 and the doping level of the well region has an implant dose of from 5E13 to 1E15 atoms/cm 2 .