IP Library Granted Patent US 11,907,061
Granted Patent B2
US 11,907,061 · App. 17/559,531 · Granted Feb 20, 2024

Methods and devices for error correction

Inventors: Scott E. Schaefer (Boise, ID); Aaron P. Boehm (Boise, ID)
G06F11/1012G06F11/073G06F11/0793G06F11/1068G06F13/28
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Quick Facts
Patent No.
US 11,907,061
App. No.
17/559,531
Granted
Feb 20, 2024
Kind
B2
Abstract

Methods, systems, and devices are described herein for using codewords to detect or correct errors in data (e.g., data stored in a memory device). A host device may generate one or more codewords associated with data to be stored in the memory device. In some cases, the host device may generate one or more codewords for error detection and correction (e.g., corresponding to data transmitted by the host device to the memory device). In some cases, the host device may transmit the codewords and the associated data using an extended (e.g., adjustable) burst length such that the one or more codewords may be included in the burst along with the data. Additionally or alternatively, the host device may transmit one or more of the codewords over one or more channels different than the one or more channels used to transmit the data.

Claims (59)

1. A method, comprising:

identifying a first set of data for communicating over a first channel between a memory device and a host device, the first channel associated with a channel width and the first set of data corresponding to a first burst length;

generating a first codeword for error correction or error detection based at least in part on at least a portion of the first set of data;

generating a second codeword for error correction or error detection based at least in part on the at least the portion of the first set of data and the first codeword; and

transmitting, from the memory device or the host device, a second set of data that includes the first set of data, the first codeword, and the second codeword.

2. The method of claim 1 , further comprising:

generating the second codeword for error correction or error detection of the first set of data, the first codeword, or both, wherein generating the second codeword is based at least in part on generating the second codeword for error correction or error detection of the first set of data, the first codeword, or both.

3. The method of claim 1 , further comprising:

transmitting the second set of data over the first channel, wherein transmitting the second set of data is based at least in part on transmitting the second set of data over the first channel.

4. The method of claim 3 , further comprising:

transmitting the second set of data using a second burst length that is greater than the first burst length, wherein transmitting the second set of data is based at least in part on transmitting the second set of data using the second burst length.

5. The method of claim 1 , further comprising:

transmitting the first set of data over the first channel; and

transmitting the first codeword and the second codeword over a second channel different than the first channel, wherein transmitting the second set of data is based at least in part on transmitting the first set of data over the first channel and transmitting the first codeword and the second codeword over the second channel.

6. The method of claim 5 , further comprising:

transmitting the first set of data using the first burst length; and

transmitting the first codeword and the second codeword using the first burst length, wherein transmitting the second set of data is based at least in part on transmitting the first set of data using the first burst length and transmitting the first codeword and the second codeword using the first burst length.

7. The method of claim 1 , further comprising:

extending the channel width of the first channel to include the first codeword and the second codeword; and

transmitting the second set of data over the first channel using the extended channel width.

8. The method of claim 7 , further comprising:

increasing a quantity of pins associated with the channel width by one or more pins, wherein extending the channel width to include the first codeword and the second codeword is based at least in part on increasing the quantity of pins associated with the channel width.

9. The method of claim 1 , further comprising:

dividing the first set of data into a plurality of portions; and

generating a first plurality of codewords and a second plurality of codewords for error correction or error detection based at least in part on the plurality of portions, wherein the first plurality of codewords comprises the first codeword and the second plurality of codewords comprises the second codeword, and wherein the second set of data includes the first plurality of codewords and the second plurality of codewords.

10. An apparatus, comprising:

a memory controller configured to cause the apparatus to:

identify a first set of data for communicating over a first channel between a memory device and a host device, the first channel associated with a channel width and the first set of data corresponding to a first burst length;

generate a first codeword for error correction or error detection based at least in part on at least a portion of the first set of data;

generate a second codeword for error correction or error detection based at least in part on the at least the portion of the first set of data and the first codeword; and

transmit, from the memory device or the host device, a second set of data that includes the first set of data, the first codeword, and the second codeword.

11. The apparatus of claim 10 , wherein the memory controller is further configured to cause the apparatus to:

generate the second codeword for error correction or error detection of the first set of data, the first codeword, or both, wherein generating the second codeword is based at least in part on generating the second codeword for error correction or error detection of the first set of data, the first codeword, or both.

12. The apparatus of claim 10 , wherein the memory controller is further configured to cause the apparatus to:

transmit the second set of data over the first channel, wherein transmitting the second set of data is based at least in part on transmitting the second set of data over the first channel.

13. The apparatus of claim 12 , wherein the memory controller is further configured to cause the apparatus to:

transmit the second set of data using a second burst length that is greater than the first burst length, wherein transmitting the second set of data is based at least in part on transmitting the second set of data using the second burst length.

14. The apparatus of claim 10 , wherein the memory controller is further configured to cause the apparatus to:

transmit the first set of data over the first channel; and

transmit the first codeword and the second codeword over a second channel different than the first channel, wherein transmitting the second set of data is based at least in part on transmitting the first set of data over the first channel and transmitting the first codeword and the second codeword over the second channel.

15. The apparatus of claim 14 , wherein the memory controller is further configured to cause the apparatus to:

transmit the first set of data using the first burst length; and

transmit the first codeword and the second codeword using the first burst length, wherein transmitting the second set of data is based at least in part on transmitting the first set of data using the first burst length and transmitting the first codeword and the second codeword using the first burst length.

16. The apparatus of claim 10 , wherein the memory controller is further configured to cause the apparatus to:

extend the channel width of the first channel to include the first codeword and the second codeword; and

transmit the second set of data over the first channel using the extended channel width.

17. The apparatus of claim 16 , wherein the memory controller is further configured to cause the apparatus to:

increase a quantity of pins associated with the channel width by one or more pins, wherein extending the channel width to include the first codeword and the second codeword is based at least in part on increasing the quantity of pins associated with the channel width.

18. The apparatus of claim 10 , wherein the memory controller is further configured to cause the apparatus to:

divide the first set of data into a plurality of portions; and

generate a first plurality of codewords and a second plurality of codewords for error correction or error detection based at least in part on the plurality of portions, wherein the first plurality of codewords comprises the first codeword and the second plurality of codewords comprises the second codeword, and wherein the second set of data includes the first plurality of codewords and the second plurality of codewords.

19. A method, comprising:

receiving a first set of data over a first channel associated with a first channel width, the first set of data corresponding to a first burst length;

identifying, in the first set of data, a first codeword for error correction or error detection of a second set of data included in the first set of data and a second codeword associated with the first codeword and the second set of data; and

writing the second set of data, the first codeword, and the second codeword to one or more portions of a memory device.

20. The method of claim 19 , further comprising:

writing the first set of data to a first portion of the memory device;

writing the first codeword to a second portion of the memory device different than the first portion of the memory device; and

writing the second codeword to a third portion of the memory device different than the first portion of the memory device and the second portion of the memory device.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 10, 2023
From: SCHAEFER, SCOTT E.; BOEHM, AARON P.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 064548/0768 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 10, 2023
From: MICRON TECHNOLOGY, INC.
To: LODESTAR LICENSING GROUP LLC
Reel/Frame 064548/0869 →
Continuity (3)
Continuation 16579219 · Sep 23, 2019
Provisional Application 62746316 · Oct 16, 2018
Related Publication 20220188186A1 · Jun 16, 2022
Cited By (1)
US 12,541,428