Controlling charge-balance and transients in a multi-level power converter
Circuits and methods that more effectively and efficiently solving the charge-balance problem for multi-level converter circuits by establishing a control method that selects an essentially optimal pattern or set of switch states that moves the fly capacitors towards a charge-balance state or maintains the current charge state every time a voltage level at an output node is selected regardless of what switch state or states were used in the past. Accordingly, multi-level converter circuit embodiments of the invention are free to select a different switch state or output voltage level every switching cycle without needing to keep track of any prior switch state or sequence of switch states. Additional benefits include improved transient performance made possible by the novel charge-balance method.
1. A method of setting output level and charge-balancing a set of fly capacitors during a switching cycle of a multi-level converter circuit that includes (1) a set of switches configured to be serially coupled between a first terminal and a second terminal, and (2) the set of fly capacitors each fly capacitor being coupled between a pair of low-side switches among the set of switches and between a pair of high-side switches among the set of switches, the method including:
(a) selecting one fly capacitor among the set of fly capacitors that has not previously been selected;
(b) if a voltage on the selected fly capacitor is above an associated target voltage and there are remaining low-side or high-side switches among the set of switches that are currently closable to enable a discharge path for the selected fly capacitor, then (1) setting the remaining low-side or high-side switches that enable the discharge path for the selected fly capacitor to a closed state, and otherwise (2) setting the remaining low-side or high-side switches that enable a charging path for the selected fly capacitor to a closed state;
(c) looping to step (a) until all fly capacitors among the set of fly capacitors have been selected; and
(d) for a remaining pair of left-over switches among the set of switches, setting an associated high-side switch or an associated low-side switch among the set of switches to a closed state based on a set of switch count rules, wherein the multi-level converter circuit has M total levels and the set of switch count rules for a level m of the multi-level converter circuit includes:
(a) M−m low-side switches among the set of switches must be closed;
(b) m−1 high-side switches among the set of switches must be closed; and
(c) low-side switches and high-side switches among the set of switches that are not required to be closed must be open.
2. The method of claim 1 , further including: when setting the remaining switches among the set of switches that enable the discharge path for the selected fly capacitor, decrementing the number of low-side switches among the set of switches that are closed and the number of high-side switches among the set of switches that are closed.
3. The method of claim 1 , wherein the multi-level converter circuit further includes an output inductor, further including selecting the associated target level so to meet or exceed a desired minimum voltage drop across the output inductor.
4. The method of claim 1 , further including setting the associated target level as a function of a detected load transient of the multi-level converter circuit.
5. The method of claim 1 , further including setting the associated target level as a function of a deviation of an output voltage or current of the multi-level converter circuit from a desired target value.
6. The method of claim 1 , further including setting the associated target level in response to an applied input signal.
7. A multi-level power converter including:
(a) a multi-level converter circuit including (i) a set of switches configured to be serially coupled between a first terminal and a second terminal, and (ii) a set of fly capacitors, each fly capacitor being coupled between a pair of low-side switches among the set of switches and between a pair of high-side switches among the set of switches, the multi-level converter circuit configured to receive an input voltage on the first terminal and produce an output voltage on an output terminal, wherein the output terminal is configured to be coupled to a first terminal of an inductor;
(b) a feedback controller coupled to a second terminal of the inductor and configured to produce a signal indicative of a voltage at the second terminal of the inductor;
(c) a multi-level controller coupled to the feedback controller and to the multi-level converter circuit, and configured to receive at least the signal from the feedback controller and a respective voltage status signal from the multi-level converter circuit corresponding to a respective fly capacitor among the set of fly capacitors, wherein the multi-level controller is configured to charge-balance each fly capacitor among the set of fly capacitors during a switching cycle of the multi-level converter circuit in response to the received signals by:
(1) selecting one fly capacitor among the set of fly capacitors that has not previously been selected;
(2) if a voltage on the selected fly capacitor is above an associated target voltage and there are remaining low-side or high-side switches among the set of switches that are currently closable to enable a discharge path for the selected fly capacitor, then (i) setting the remaining low-side or high-side switches that enable the discharge path for the selected fly capacitor to a closed state, and otherwise (ii) setting the remaining low-side or high-side switches that enable a charging path for the selected fly capacitor to a closed state;
(3) looping to step (c)(1) until all fly capacitors among the set of fly capacitors have been selected; and
(4) for a remaining pair of left-over switches among the set of switches, setting an associated high-side switch or an associated low-side switch among the set of switches to a closed state based on a set of switch count rules, wherein the multi-level converter circuit has M total levels and the set of switch count rules for a level m of the multi-level converter circuit includes:
(a) M−m low-side switches among the set of switches must be closed;
(b) m−1 high-side switches among the set of switches must be closed; and
(c) low-side switches and high-side switches among the set of switches that are not required to be closed must be open.
8. The multi-level power converter of claim 7 , wherein the multi-level controller is further configured to decrement the number of low-side switches among the set of switches that are closed and the number of high-side switches among the set of switches that are closed when setting the switches that enable the discharge path for the selected fly capacitor.
9. The multi-level power converter of claim 7 , wherein the multi-level controller is further configured to select the associated target level so to meet or exceed a desired minimum voltage drop across the inductor.
10. The multi-level power converter of claim 7 , further including setting the associated target level as a function of a detected load transient of the multi-level converter circuit.
11. The multi-level power converter of claim 7 , wherein the multi-level controller is further configured to set the associated target level as a function of a deviation of the output voltage or current of the multi-level converter circuit from a desired target value.
12. The multi-level power converter of claim 7 , wherein the multi-level controller is further configured to set the associated target level in response to an applied input signal.