Memory efficient virtual address management for system calls
Systems and methods for managing host virtual addresses in a system call are disclosed. In one implementation, a processing device may receive, by a supervisor managing a first application), a system call initiated by the first application, wherein a first parameter of the system call specifies a memory buffer virtual address of the first application and a second parameter of the system call specifies the memory buffer virtual address of the second application. The processing device may also translate the memory buffer virtual address of the first application to a first physical address and may translate the memory buffer virtual address of the second application to a second physical address. The processing device may further compare the first physical address to the second physical address and responsive to determining that the first physical address matches the second physical address, the processing device may execute the system call using the memory buffer virtual address of the second application.
1. A method, comprising:
receiving, by a supervisor managing a first application, a system call initiated by the first application, wherein a first parameter of the system call specifies a first memory buffer virtual address of the first application and a second parameter of the system call specifies a second memory buffer virtual address of a second application;
translating, by the supervisor, the first memory buffer virtual address of the first application to a first physical address;
translating, by the supervisor, the second memory buffer virtual address of the second application to a second physical address;
comparing, by the supervisor, the first physical address to the second physical address; and
responsive to determining that the first physical address matches the second physical address, executing, by the supervisor, the system call using the second memory buffer virtual address of the second application.
2. The method of claim 1 further comprising:
responsive to determining that the first physical address does not match the second physical address, returning an error code to the first application.
3. The method of claim 1 further comprising:
responsive to determining that the first physical address does not match the second physical address, notifying the first application of a different memory buffer virtual address of the second application corresponding to the first memory buffer virtual address of the first application.
4. The method of claim 1 , wherein the second application is an operating system.
5. The method of claim 1 , wherein translating the first memory buffer virtual address of the first application to the first physical address is performed using a shadow page table maintained by the supervisor.
6. The method of claim 1 , wherein translating the second memory buffer virtual address of the second application to the second physical address is performed using a supervisor page table maintained by the supervisor.
7. The method of claim 1 , wherein executing the system call further comprises accessing, by the supervisor, the memory buffer referenced by the second memory buffer virtual address of the second application.
8. A system comprising:
a memory;
a processing device operatively coupled to the memory, the processing device to:
receive a system call initiated by a first application, wherein a first parameter of the system call specifies a first memory buffer virtual address of the first application and a second parameter of the system call specifies a second memory buffer virtual address of a second application;
translate the memory buffer virtual address of the first application to a first physical address;
translate the memory buffer virtual address of the second application to a second physical address;
compare the first physical address to the second physical address; and
responsive to determining that the first physical address matches the second physical address, execute the system call using the second memory buffer virtual address of the second application.
9. The system of claim 8 , wherein the processing device is further to:
responsive to determining that the first physical address does not match the second physical address, return an error code to the first application.
10. The system of claim 8 , wherein the second application is an operating system.
11. The system of claim 8 , wherein to translate the first memory buffer virtual address of the first application to the first physical address, the processing device is to use a shadow page table maintained by a supervisor managing the first application.
12. The system of claim 8 , wherein to translate the second memory buffer virtual address of the second application to the second physical address, the processing device is to use a supervisor page table maintained by a supervisor managing the first application.
13. The system of claim 8 , wherein the processing device is further to:
responsive to determining that the first physical address does not match the second physical address, notify the first application of a different memory buffer virtual address of the second application corresponding to the first memory buffer virtual address of the first application.
14. The system of claim 8 , wherein to execute the system call, the processing device is further to access the memory buffer referenced by the second memory buffer virtual address of the second application.
15. A non-transitory computer-readable media storing instructions that, when executed, cause a processing device to:
receive a system call initiated by a first application, wherein a first parameter of the system call specifies a first memory buffer virtual address of the first application and a second parameter of the system call specifies a second memory buffer virtual address of a second application;
translate the memory buffer virtual address of the first application to a first physical address;
translate the memory buffer virtual address of the second application to a second physical address;
compare the first physical address to the second physical address; and
responsive to determining that the first physical address matches the second physical address, execute the system call using the second memory buffer virtual address of the second application.
16. The non-transitory computer-readable media of claim 15 , wherein to translate the first memory buffer virtual address of the first application to the first physical address, the processing device is to use a shadow page table maintained by a supervisor managing the first application.
17. The non-transitory computer-readable media of claim 15 , wherein to translate the second memory buffer virtual address of the second application to the second physical address, the processing device is to use a supervisor page table maintained by a supervisor managing the first application.
18. The non-transitory computer-readable media of claim 15 , wherein the processing device is further to:
responsive to determining that the first physical address does not match the second physical address, return an error code to the first application.
19. The non-transitory computer-readable media of claim 15 , wherein the second application is an operating system.
20. The non-transitory computer-readable media of claim 15 , wherein to execute the system call, the processing device is further to access the memory buffer referenced by the second memory buffer virtual address of the second application.