IP Library Granted Patent US 12,125,857
Granted Patent B2
US 12,125,857 · App. 17/581,464 · Granted Oct 22, 2024

Geiger-mode focal plane array having increased tolerance to optical overstress

Inventors: Mark Allen Itzler (Princeton, NJ); Brian Piccione (Yardley, PA); Xudong Jiang (Princeton, NJ); Krystyna Slomkowski (Parlin, NJ)
Assignee: LG INNOTEK CO., LTD.
H01L27/1446G01J1/44H01L31/02027H01L31/107G01J2001/4466G01J2001/448H01C7/006H01L27/14609
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Quick Facts
Patent No.
US 12,125,857
App. No.
17/581,464
Granted
Oct 22, 2024
Kind
B2
Abstract

A GmAPD FPA having increased tolerance optical overstress includes a limit resistor that is monolithically integrated into each pixel in the FPA, and which limits the magnitude of the current entering the read out integrated circuit.

Claims (46)

1. A Geiger mode avalanche photodiode (GmAPD) focal plane array (FPA) comprising a plurality of pixels, each pixel comprising:

a GmAPD;

a read-out integrated circuit (ROIC); and

a limit resistor that is integrated in the pixel and coupled in series between the GmAPD and to the ROIC within the pixel,

wherein the limit resistor is configured to limit a magnitude of a GmAPD avalanche current before entering the ROIC,

wherein the limit resistor is monolithically integrated with at least one of the GmAPD or with the ROIC of each pixel, and

wherein the ROIC includes a plurality of transistors, and one end of the limit resistor is directly connected with one of the plurality of transistors.

2. The GmAPD FPA of claim 1 , wherein the limit resistor is monolithically integrated with only the GmAPD of each pixel.

3. The GmAPD FPA of claim 1 , wherein the limit resistor is monolithically integrated with only the ROIC of each pixel.

4. The GmAPD FPA of claim 1 , wherein the limit resistor comprises a first limit resistor and a second limit resistor, the first limit resistor being monolithically integrated with the GmAPD of each pixel and the second limit resistor being monolithically integrated with the ROIC of each pixel.

5. The GmAPD FPA of claim 1 , wherein the limit resistor is a thin-film resistor.

6. The GmAPD FPA of claim 1 , wherein the limit resistor comprises materials selected from the group consisting of NiCr and TaN.

7. The GmAPD FPA of claim 1 , wherein the limit resistor has a resistance in the range of about 1 kOhm to about 100 kOhms.

8. The GmAPD FPA of claim 1 , wherein the GmAPD comprises:

an active region formed within APD device layers;

a passivation layer disposed on the APD device layers;

an electrical contact formed on a portion of the active region;

the limit resistor, wherein the limit resistor is disposed on the passivation layer and is in electrical communication with the electrical contact; and

a bond pad formed on at least a portion of the limit resistor.

9. The GmAPD FPA of claim 8 , wherein the limit resistor has a serpentine shape, and wherein the serpentine shape comprises a predetermined number of resistor squares between the active region and the bond pad.

10. The GmAPD FPA of claim 9 , wherein the predetermined number of resistor squares corresponds to a desired tunable resistance of the limit resistor.

11. The GmAPD FPA of claim 1 , wherein the ROIC includes an active quenching circuit comprising:

a sense transistor configured to receive the avalanche current from the limit resistor;

an arm transistor; and

a disarm transistor,

wherein the sense, arm, and disarm transistors are configured to provide active-quenching functionality for the GmAPD.

12. The GmAPD FPA of claim 11 , wherein the limit resistor is electrically coupled between an electrical contact of the GmAPD and an input of the sense transistor in the active quenching circuit within the ROIC.

13. The GmAPD FPA of claim 11 , wherein the active quenching circuit is configured to, in response to detecting an avalanche current, turn on the disarm transistor to reduce a voltage drop across the GmAPD.

14. The GmAPD FPA of claim 13 , wherein the active quenching circuit is further configured to:

detect a level of the voltage drop across the GmAPD falling to a level below a predetermined threshold voltage, and

in response to detecting the voltage drop across the GmAPD, turn on the arm transistor to re-arm the GmAPD.

15. The GmAPD FPA of claim 14 , wherein the predetermine threshold voltage corresponds to the breakdown voltage of the GmAPD.

16. A method for managing an avalanche pulse current of a Geiger mode avalanche photodiode (GmAPD) focal plane array (FPA), the GmAPD FPA comprising a plurality of pixels, each pixel including a GmAPD, a read-out integrated circuit (ROIC) and a limit resistor, the method comprising:

outputting, by the GmAPD, the avalanche pulse current in response to detecting an optical signal;

monolithically integrating the limit resistor with at least one of the GmAPD or the ROIC of each pixel;

receiving, at the limit resistor, the avalanche pulse current, the limit resistor being monolithically integrated in the pixel and being coupled in series between the GmAPD and the ROIC; and

outputting, by the limit resistor to the ROIC, a limited magnitude avalanche pulse current,

wherein the ROIC includes a plurality of transistors, and one end of the limit resistor is directly connected with one of the plurality of transistors.

17. The method of claim 16 , further comprising:

actively quenching the GmAPD by the ROIC using a sense transistor, an arm transistor, and a disarm transistor.

18. The method of claim 17 , further comprising:

detecting, by the sense transistor, the limited magnitude avalanche pulse current; and

in response to detecting the limited magnitude avalanche pulse current, turning on the disarm transistor to reduce a voltage drop across the GmAPD.

19. The method of claim 18 , further comprising:

detecting a level of the voltage drop across the GmAPD to be below a predetermined threshold voltage, wherein the predetermined threshold voltage corresponds to the breakdown voltage of the GmAPD; and

in response to detecting the voltage drop, turning on the arm transistor to re-arm the GmAPD.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 12, 2023
From: ARGO AI, LLC
To: LG INNOTEK CO., LTD.
Reel/Frame 063311/0079 →
Continuity (3)
Continuation 16002816 · Jun 7, 2018
Provisional Application 62516453 · Jun 7, 2017
Related Publication 20220149086A1 · May 12, 2022
Cited By (1)
US 12,713,716