Semiconductor device
According to one embodiment, a semiconductor device includes an insulating substrate, a polycrystalline silicon semiconductor, an oxide semiconductor, a gate electrode located directly above the oxide semiconductor, a first conductive layer in contact with the polycrystalline silicon semiconductor via a first contact hole, and in contact with the oxide semiconductor via a second contact hole and a second conductive layer stacked on the first conductive layer between the first contact hole and the second contact hole. The first conductive layer includes an extending portion extending from the second contact hole toward the gate electrode. The second conductive layer is not stacked on the extending portion. The first conductive layer is thinner than the second conductive layer.
1 . A semiconductor device comprising:
an insulating substrate;
a first insulating layer disposed above the insulating substrate;
a polycrystalline silicon semiconductor disposed on the first insulating layer;
an intermediate insulating layer disposed on the polycrystalline silicon semiconductor;
an oxide semiconductor disposed on the intermediate insulating layer;
a second insulating layer disposed on the intermediate insulating layer and the oxide semiconductor;
a gate electrode disposed on the second insulating layer and located directly above the oxide semiconductor;
a first conductive layer in contact with the polycrystalline silicon semiconductor via a first contact hole penetrating the intermediate insulating layer and the second insulating layer, and in contact with the oxide semiconductor via a second contact hole penetrating the second insulating layer, the second contact hole exposing the oxide semiconductor; and
a second conductive layer stacked on the first conductive layer between the first contact hole and the second contact hole,
wherein the first conductive layer includes an extending portion extending from the second contact hole toward the gate electrode,
the second conductive layer is not stacked on the extending portion,
a film thickness of the first conductive layer directly above the second insulating layer is less than a film thickness of the second conductive layer above the second insulating layer,
the film thickness of the second conductive layer directly above the second insulating layer is three times or more than the film thickness of the first conductive layer above the second insulating layer,
the first conductive layer is formed of a material different from that of the second conductive layer,
a density of the first conductive layer is less than one half of a density of the second conductive layer,
the second conductive layer includes a first end surface and a second end surface,
the first end surface is located directly above the polycrystalline silicon semiconductor, and
the second end surface is located directly above the oxide semiconductor.
2 . The semiconductor device of claim 1 , wherein
the first conductive layer contains at least one of titanium (Ti) and aluminum (Al), and
the second conductive layer contains at least one of molybdenum (Mo) and tungsten (W).
3 . The semiconductor device of claim 1 , wherein
the gate electrode is a stacked body comprising a first layer formed of a same material as that of the first conductive layer and a second layer formed of a same material as that of the second conductive layer.
4 . The semiconductor device of claim 1 , wherein
the oxide semiconductor includes a first region directly under the gate electrode, a second region directly under the extending portion and a third region between the first region and the second region, and
impurity concentrations of the second region and the third region are higher than an impurity concentration of the first region.
5 . The semiconductor device of claim 1 , wherein
the second conductive layer is stacked on the first conductive layer in the second contact hole.
6 . The semiconductor device of claim 1 , wherein
the second conductive layer is stacked on the first conductive layer in the first contact hole.
7 . The semiconductor device of claim 6 , wherein
impurity ions contained in the polycrystalline silicon semiconductor are different in type from impurity ions contained in the oxide semiconductor.
8 . The semiconductor device of claim 1 , wherein
the second conductive layer is not stacked on the first conductive layer in the first contact hole, and
impurity ions contained in the polycrystalline silicon semiconductor are the same in type as impurity ions contained in the oxide semiconductor.
9 . The semiconductor device of claim 1 , wherein
the second conductive layer is stacked on the first conductive layer in the first contact hole and is not stacked on the first conductive layer in the second contact hole.
10 . The semiconductor device of claim 1 , wherein
the second conductive layer is stacked on the first conductive layer in the first contact hole and the second contact hole.
11 . The semiconductor device of claim 1 , wherein
the second conductive layer is not stacked on the first conductive layer in the first contact hole and the second contact hole.
12 . The semiconductor device of claim 1 , wherein
the intermediate insulating layer includes a third insulating layer in contact with the oxide semiconductor, and
the second insulating layer and the third insulating layer are formed of silicon oxide.
13 . The semiconductor device of claim 1 , wherein
the second conductive layer is not stacked on a part of the extending portion that contacts the oxide semiconductor.
14 . The semiconductor device of claim 1 , wherein
the second conductive layer is not stacked on the first conductive layer over the second contact hole.
15 . The semiconductor device of claim 1 , wherein
the film thickness at any portion of the second conductive layer is greater than the film thickness of the first conductive layer directly under that portion.
16 . The semiconductor device of claim 1 , wherein
the oxide semiconductor includes a channel region overlapping the gate electrode, and
the second insulating layer does not include a contact hole between the channel region and the gate electrode.
17 . The semiconductor device of claim 16 , wherein
the second insulating layer is sandwiched between the extending portion and the oxide semiconductor, and is sandwiched between the gate electrode and the oxide semiconductor.
18 . The semiconductor device of claim 1 , wherein
the second insulating layer is an inorganic insulating layer.