IP Library Granted Patent US 12,455,755
Granted Patent B2
US 12,455,755 · App. 17/592,815 · Granted Oct 28, 2025

Coordinating timer access for virtual machines using peripheral component interface cards

Inventors: Michael Tsirkin (Haifa, IL); Amnon Ilan (Raanana, IL)
Assignee: Red Hat, Inc.
G06F9/45558G06F9/45545G06F9/4812G06F13/1668G06F13/24G06F13/4221G06F2009/45562
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Quick Facts
Patent No.
US 12,455,755
App. No.
17/592,815
Granted
Oct 28, 2025
Kind
B2
Abstract

Peripheral component interface (PCI) cards can be used to coordinate timer access for virtual machines. For example, a computing device can send, by a virtual machine deployed by a hypervisor, a request for a timer. A guest driver can write a timer for the virtual machine into a first portion of memory on a PCI card. The first portion of memory can be mapped to the virtual machine by the hypervisor. The computing device can receive a card interrupt for the timer. The computing device can translate the card interrupt into a timer interrupt. For example, the card interrupt may be received and translated by the hypervisor or the guest driver. The computing device can inject the timer interrupt to the virtual machine. In some examples, the virtual machine may receive the timer interrupt without exiting to the hypervisor.

Claims (61)

1. A system comprising:

a processor; and

a memory including instructions that are executable by the processor for causing the processor to:

transmit, by a virtual machine deployed by a hypervisor, a timer request;

in response to receiving the timer request, write, by a guest driver, a timer for the virtual machine into a first portion of memory on a peripheral component interface (PCI) card, the first portion of memory being mapped to the virtual machine by the hypervisor;

receive, from the PCI card, a card interrupt for the timer;

translate the card interrupt into a timer interrupt; and

inject, by the hypervisor, the timer interrupt to the virtual machine while the virtual machine is executing.

2. The system of claim 1 , wherein the memory further comprises instructions executable by the processor for causing the processor to:

receive, by the virtual machine, the timer interrupt without exiting to the hypervisor.

3. The system of claim 1 , wherein the card interrupt is a first card interrupt and the timer interrupt is a first timer interrupt, wherein a second card interrupt from the PCI card is received and translated into a second timer interrupt by the guest driver, and wherein the second timer interrupt is injected by the guest driver to the virtual machine while the virtual machine is executing.

4. The system of claim 1 , wherein the card interrupt is a first card interrupt and the timer interrupt is a first timer interrupt, wherein a second card interrupt from the PCI card is received by an input-output memory management unit, and wherein the input-output memory management unit is configured to:

determine, by the hypervisor, that the virtual machine is executing;

in response to receiving the second card interrupt and determining that the virtual machine is executing, translate the second card interrupt into a second timer interrupt; and

inject the second timer interrupt to the virtual machine while the virtual machine is executing.

5. The system of claim 1 , wherein the card interrupt is a first card interrupt, wherein a second card interrupt is received from the PCI card by an input-output memory management unit, and wherein the input-output memory management unit is configured to:

determine, by the hypervisor, that the virtual machine is not executing;

in response to receiving the second card interrupt and determining that the virtual machine is not executing, translate the second card interrupt into a host timer interrupt; and

transmit the host timer interrupt to a host interrupt handler;

wherein the host interrupt handler is configured to:

power on the virtual machine; and

inject the host timer interrupt to the virtual machine.

6. The system of claim 1 , wherein the card interrupt is received by the hypervisor, and wherein the hypervisor is configured to translate the card interrupt into the timer interrupt.

7. The system of claim 1 , wherein the memory further comprises instructions executable by the processor for causing the processor to:

transmit, by the virtual machine, a timer cancellation request to the guest driver; and

in response to receiving the timer cancellation request, prevent the guest driver from generating the card interrupt.

8. The system of claim 1 , wherein the virtual machine is a first virtual machine of a plurality of virtual machines deployed by the hypervisor, wherein the first portion of memory is included in a plurality of portions of memory in the PCI card, and wherein each portion of memory of the plurality of portions of memory is mapped to a separate virtual machine of the plurality of virtual machines and includes an independently operating timer.

9. A method comprising:

transmitting, by a virtual machine deployed by a hypervisor, a timer request;

in response to receiving the timer request, writing, by a guest driver, a timer for the virtual machine into a first portion of memory on a peripheral component interface (PCI) card, the first portion of memory being mapped to the virtual machine by the hypervisor;

receiving, from the PCI card, a card interrupt for the timer;

translating the card interrupt into a timer interrupt; and

injecting, by the hypervisor, the timer interrupt to the virtual machine while the virtual machine is executing.

10. The method of claim 9 , further comprising:

receiving, by the virtual machine, the timer interrupt without exiting to the hypervisor.

11. The method of claim 9 , wherein the card interrupt is a first card interrupt and the timer interrupt is a first timer interrupt, wherein a second card interrupt is received from the PCI card and translated into a second timer interrupt by the guest driver, and wherein the second timer interrupt is injected by the guest driver to the virtual machine while the virtual machine is executing.

12. The method of claim 9 , wherein the card interrupt is a first card interrupt and the timer interrupt is a first timer interrupt, wherein a second card interrupt from the PCI card is received by an input-output memory management unit, and wherein the method further comprises:

in response to receiving the second card interrupt and determining that the virtual machine is executing, translating, by the input-output memory management unit, the second card interrupt into a second timer interrupt; and

injecting, by the input-output memory management unit, the second timer interrupt to the virtual machine while the virtual machine is executing.

13. The method of claim 9 , wherein the card interrupt is a first card interrupt, wherein a second card interrupt is received from the PCI card by an input-output memory management unit, and wherein the method further comprises:

in response to receiving the second card interrupt and determining that the virtual machine is not executing, translating, by the input-output memory management unit, the second card interrupt into a host timer interrupt;

transmitting, by the input-output memory management unit, the host timer interrupt to a host interrupt handler;

powering on, by the host interrupt handler, the virtual machine; and

injecting, by the host interrupt handler, the host timer interrupt to the virtual machine.

14. The method of claim 9 , wherein the card interrupt is received by the hypervisor, and wherein the hypervisor is configured to translate the card interrupt into the timer interrupt.

15. The method of claim 9 , further comprising:

transmitting, by the virtual machine, a timer cancellation request to the guest driver; and

in response to receiving the timer cancellation request, preventing the guest driver from generating the card interrupt.

16. The method of claim 9 , wherein the virtual machine is a first virtual machine of a plurality of virtual machines deployed by the hypervisor, wherein the first portion of memory is included in a plurality of portions of memory in the PCI card, and wherein each portion of memory of the plurality of portions of memory is mapped to a separate virtual machine of the plurality of virtual machines and includes an independently operating timer.

17. A non-transitory computer-readable medium comprising program code that is executable by a processor for causing the processor to:

transmit, by a virtual machine deployed by a hypervisor, a timer request;

in response to receiving the timer request, write, by a guest driver, a timer for the virtual machine into a first portion of memory on a peripheral component interface (PCI) card, the first portion of memory being mapped to the virtual machine by the hypervisor;

receive, from the PCI card, a card interrupt for the timer;

translate the card interrupt into a timer interrupt; and

inject, by the hypervisor, the timer interrupt to the virtual machine while the virtual machine is executing.

18. The non-transitory computer-readable medium of claim 17 , wherein program code is executable to further cause the processor to:

receive, by the virtual machine, the timer interrupt without exiting to the hypervisor.

19. The non-transitory computer-readable medium of claim 17 , wherein the card interrupt is a first card interrupt and the timer interrupt is a first timer interrupt, wherein a second card interrupt is received and translated into a second timer interrupt by the guest driver, and wherein the second timer interrupt is injected by the guest driver to the virtual machine while the virtual machine is executing.

20. The non-transitory computer-readable medium of claim 17 , wherein the card interrupt is a first card interrupt and the timer interrupt is a first timer interrupt, wherein a second card interrupt is received by an input-output memory management unit, and wherein the input-output memory management unit is configured to:

in response to receiving the card interrupt and determining that the virtual machine is executing, translate the second card interrupt into a second timer interrupt; and

inject the second timer interrupt to the virtual machine while the virtual machine is executing.

Assignments (2)
CHANGE OF NAME Recorded Mar 3, 2026
From: RED HAT, INC.
To: RED HAT, LLC
Reel/Frame 074913/0759 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2022
From: TSIRKIN, MICHAEL; ILAN, AMNON
To: RED HAT, INC.
Reel/Frame 058889/0901 →
Continuity (1)
Related Publication 20230251883A1 · Aug 10, 2023
References Cited (22)
US 6243785B1 · Lowe · 2001 [cited by examiner]
US 7945908B1 · Waldspurger et al. · 2011 [cited by applicant]
US 8533709B2 · Nicholas et al. · 2013 [cited by applicant]
US 8627133B2 · Tsirkin et al. · 2014 [cited by applicant]
US 9571412B2 · Hussain et al. · 2017 [cited by applicant]
US 10169269B2 · Coleman · 2019 [cited by examiner]
US 10496435B2 · Bar · 2019 [cited by examiner]
US 11023250B2 · Gavrilov · 2021 [cited by examiner]
US 11038807B2 · Noureddine · 2021 [cited by examiner]
US 11042495B2 · Chan · 2021 [cited by examiner]
US 20080294825A1 · Mahalingam · 2008 [cited by examiner]
US 20140244877A1 · Williamson · 2014 [cited by examiner]
US 20160077848A1 · Tu · 2016 [cited by examiner]
US 20160098289A1 · Lim · 2016 [cited by examiner]
WO WO2017171744A1 · 2017 [cited by examiner]
Lim, Jin Tack, and Jason Nieh. “Optimizing Nested Virtualization Performance Using Direct Virtual Hardware.” Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages an… [cited by examiner]
Har'El et al., “Efficient and Scalable Paravirtual I/O System”, 2013, USENIX Annual Technical Conference, pp. 1-12 (Year: 2013). [cited by examiner]
Gordon et al., “ELI: Bare-Metal Performance for I/O Virtualization”, 2012, ASPLOS'12, pp. 1-12 (Year: 2012). [cited by examiner]
Adamczyk, B. and Chydzinski, A., “Achieving High Resolution Timer Events in Virtualized Environment,” PLOSONE, 2015, https://journals.plos.org/plosone/article?id=10.1371/journal.pone.0130887. [cited by applicant]
Ahmad, I., et al., “Improving Performance with Interrupt Coalescing for Virtual Machine Disk IO in VMware ESX Server,” VMWare Inc., https://rcs.uwaterloo.ca/˜ali/papers/vpact-vic-nop.pdf. [cited by applicant]
“Determining and Changing the Rate of Timer Interrupts a Guest Operating System Requests,” VMware, Inc., 2017, https://kb.vmware.com/s/article/1005802. [cited by applicant]
“Timekeeping in VMware Virtual Machines,” VMware, Inc., 2008, https://www.vmware.com/pdf/vmware_timekeeping.pdf. [cited by applicant]