IP Library Granted Patent US 12,058,240
Granted Patent B2
US 12,058,240 · App. 17/605,999 · Granted Aug 6, 2024

Enhanced randomness for digital systems

Inventors: Yurang Kuang (Ottawa, CA); Nicolas Bettenburg (Ottawa, CA)
Assignee: Quantropi Inc.
H04L9/0662G06F7/582H04L9/0618H04L9/0631H04L9/085H04L9/0869H04L2209/08
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Quick Facts
Patent No.
US 12,058,240
App. No.
17/605,999
Granted
Aug 6, 2024
Kind
B2
Abstract

A digital processing method, which comprises obtaining a stream of N-bit input data words; obtaining a value k between 0 and M−1, inclusively, where M>1; processing each of the N-bit input data words at least based on the kth of M permutation elements to produce a corresponding N-bit output data word; and outputting a stream of N-bit output data words on a network or storing the stream of the N-bit output data words in a non-transitory storage medium.

Claims (61)

1. A method of operating a computing device to carry out pseudo-random number generation, the method comprising:

obtaining a seed S;

obtaining a stream of N-bit input data words;

obtaining a value k between 0 and M−1, inclusively, where M>1, wherein the value k is obtained based at least in part on the seed S;

processing each of the N-bit input data words at least based on the kth of M permutation elements of size 2 N -by-2 N to produce a corresponding N-bit output data word for each of the N-bit input data words, wherein the value of k is changed such that successive ones of the N-bit input data words are processed with different ones of the permutation elements, the N-bit output data words so produced forming a stream of N-bit output data words; and

outputting the stream of N-bit output data words on a network or storing the stream of N-bit output data words in a non-transitory storage medium.

2. The method defined in claim 1 , wherein the processing comprises (a) converting each of the N-bit input data words into a corresponding sparse 2 N -element input array, (b) processing the sparse 2 N -element input array with said kth of M permutation elements to produce a sparse 2 N -element output array and (c) converting the sparse 2 N -element output array into the corresponding N-bit output data word.

3. The method defined in claim 1 , further comprising producing the N-bit input data words with a pseudo-random number generator.

4. The method defined in claim 3 , wherein the stream of the N-bit output data words has a greater randomness than the stream of the N-bit input data words.

5. The method defined in claim 4 , wherein the pseudo-random number generator is a first pseudo-random number generator, wherein the value of k is produced by a second pseudo-random number generator.

6. The method defined in claim 1 , wherein the value of k is produced by a pseudo-random number generator.

7. The method defined in claim 6 , wherein the pseudo-random number generator is seeded by the seed S or a function of the seed S.

8. The method defined in claim 1 , wherein the value of k is produced by converting an output of a pseudo-random number generator having a value in a range greater than between 0 and M−1 to the value k between 0 and M−1, the pseudo-random number generator being seeded by the seed S or a function of the seed S.

9. The method defined in claim 1 , wherein each of the M permutation elements comprises a switch fabric configured to carry out a 2 N -by-2 N blocking switch operation.

10. The method defined in claim 1 , wherein each of the permutation elements carries out an operation that is characterizable as a respective permutation matrix with 2 N rows and 2 N columns, and wherein the processing comprises:

obtaining a row index of the kth permutation matrix from each of the N-bit input data words;

obtaining the column index of the non-zero element in the row; and

obtaining the corresponding N-bit output data word from the column index.

11. The method defined in claim 1 , further comprising initializing the permutation elements.

12. The method defined in claim 11 , wherein each of the permutation elements carries out an operation that is characterizable as a respective 2 N -by-2 N permutation matrix.

13. The method defined in claim 12 , wherein initializing the permutation elements comprises selecting, as each of the permutation elements, a different 2 N -by-2 N permutation matrix.

14. The method defined in claim 13 , wherein the seed S is used to randomize the 2 N -by-2 N permutation matrices for the different permutation elements.

15. The method defined in claim 1 , further comprising periodically changing the seed S.

16. The method defined in claim 1 , wherein M is at least as large as 64.

17. A non-transitory computer-readable medium comprising computer-readable instructions which, when executed by a processor, cause the processor to carry out a method of operating a computing device to carry out pseudo-random number generation, the method comprising:

obtaining a seed S;

obtaining a stream of N-bit input data words;

obtaining a value k between 0 and M−1, inclusively, where M>1, wherein the value k is obtained based at least in part on the seed S;

processing each of the N-bit input data words at least based on the kth of M permutation elements of size 2 N -by-2 N to produce a corresponding N-bit output data word for each of the N-bit input data words, wherein the value of k is changed such that successive ones of the N-bit input data words are processed with different ones of the permutation elements, the N-bit output data words so produced forming a stream of N-bit output data words; and

outputting the stream of N-bit output data words on a network or storing the stream of N-bit output data words in a non-transitory storage device.

18. A system for pseudo-random number generation, comprising:

a memory storing instructions;

a network input/output for connection to the network; and

a processor accessing the instructions and, based on the instructions, being configured to:

obtain a seed S;

obtain a stream of N-bit input data words;

obtain a value k between 0 and M−1, inclusively, where M>1, wherein the value k is obtained based at least in part on the seed S;

process each of the N-bit input data words at least based on the kth of M permutation elements of size 2 N -by-2 N to produce a corresponding N-bit output data word for each of the N-bit input data words, wherein the value of k is changed such that successive ones of the N-bit input data words are processed with different ones of the permutation elements, the N-bit output data words so produced forming a stream of N-bit output data words; and

output the stream of N-bit output data words on a network or store the stream of N-bit output data words in a non-transitory storage medium.

19. A method of operating a computing device to carry out pseudo-random number generation, the method comprising:

obtaining a stream of N-bit input data words;

obtaining a value k between 0 and M−1, inclusively, where M>1, wherein the value k is obtained based at least in part on the N-bit input data words;

processing each of the N-bit input data words at least based on the kth of M permutation elements of size 2 N -by-2 N to produce a corresponding N-bit output data word for each of the N-bit input data words, wherein the value of k is changed such that successive ones of the N-bit input data words are processed with different ones of the permutation elements, the N-bit output data words so produced forming a stream of N-bit output data words; and

outputting the stream of N-bit output data words on a network or storing the stream of N-bit output data words in a non-transitory storage medium.

20. The method defined in claim 19 , wherein the processing comprises (a) converting each of the N-bit input data words into a corresponding sparse 2 N -element input array, (b) processing the sparse 2 N -element input array with said k th of M permutation elements to produce a sparse 2 N -element output array and (c) converting the sparse 2 N -element output array into the corresponding N-bit output data word.

21. The method defined in claim 19 , further comprising producing the N-bit input data words with a pseudo-random number generator.

22. The method defined in claim 21 , wherein the stream of the N-bit output data words has a greater randomness than the stream of the N-bit input data words.

23. The method defined in claim 19 , wherein each of the M permutation elements comprises a switch fabric configured to carry out a 2 N -by-2 N blocking switch operation.

24. The method defined in claim 19 , wherein each of the permutation elements carries out an operation that is characterizable as a respective permutation matrix with 2 N rows and 2 N columns, and wherein the processing comprises:

obtaining a row index of the kth permutation matrix from each of the N-bit input data words;

obtaining the column index of the non-zero element in the row; and

obtaining the corresponding N-bit output data word from the column index.

25. The method defined in claim 19 , further comprising initializing the permutation elements.

26. The method defined in claim 25 , wherein each of the permutation elements carries out an operation that is characterizable as a respective 2 N -by-2 N permutation matrix.

27. The method defined in claim 26 , wherein initializing the permutation elements comprises selecting, as each of the permutation elements, a different 2 N -by-2 N permutation matrix.

28. The method defined in claim 19 , wherein M is at least as large as 64.

29. A non-transitory computer-readable medium comprising computer-readable instructions which, when executed by a processor, cause the processor to carry out a method of operating a computing device to carry out pseudo-random number generation, the method comprising:

obtaining a stream of N-bit input data words;

obtaining a value k between 0 and M−1, inclusively, where M>1, wherein the value k is obtained based at least in part on the N-bit input data words;

processing each of the N-bit input data words at least based on the kth of M permutation elements of size 2 N -by-2 N to produce a corresponding N-bit output data word for each of the N-bit input data words, wherein the value of k is changed such that successive ones of the N-bit input data words are processed with different ones of the permutation elements, the N-bit output data words so produced forming a stream of N-bit output data words; and

outputting the stream of N-bit output data words on a network or storing the stream of N-bit output data words in a non-transitory storage device.

Assignments (4)
SECURITY INTEREST Recorded Nov 4, 2025
From: QUANTROPI INC.
To: DUNA TRANSPORTATION AND TOURISM DEVELOPMENT KORLATOLT FELELOSSEGU TARSASAG
Reel/Frame 072772/0517 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 28, 2022
From: BETTENBURG, NICOLAS
To: QUANTROPI INC.
Reel/Frame 058801/0940 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 28, 2022
From: KUANG, YURANG
To: QUANTROPI INC.
Reel/Frame 058801/0948 →
CONFIRMATORY ASSIGNMENT Recorded Oct 25, 2021
From: KUANG, YURANG; BETTENBURG, NICOLAS
To: QUANTROPI INC.
Reel/Frame 057907/0024 →
Continuity (3)
Provisional Application 62913890 · Oct 11, 2019
Provisional Application 62837370 · Apr 23, 2019
Related Publication 20220224509A1 · Jul 14, 2022