IP Library Granted Patent US 12,086,226
Granted Patent B2
US 12,086,226 · App. 17/616,486 · Granted Sep 10, 2024

Apparatus and method

Inventors: Henricus Derckx (St Asaph, GB); Wilhelmus Van Lier (St Asaph, GB); Michael A. Cowin (St Asaph, GB)
G06F21/32G06F3/03543G06F3/03547G06F3/041661G06F3/044G06F3/0446G06F21/44G06V40/1359H01L27/1255H01L27/127G06F2203/0336G06V40/1306H01L27/1218
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Quick Facts
Patent No.
US 12,086,226
App. No.
17/616,486
Granted
Sep 10, 2024
Kind
B2
Abstract

Disclosed herein is a pixel structure comprising a plurality of layers for providing a touch sensitive pixel of a sensing array. The pixel comprises: a thin film transistor, a capacitive sensing electrode, and a reference capacitor comprising a first plate and a second plate. The capacitive sensing electrode and the second plate of the reference capacitor are connected to a gate region of the thin film transistor. Methods of manufacturing such a touch sensitive pixel are also disclosed herein.

Claims (25)

1. A pixel structure comprising a plurality of layers for providing a touch sensitive pixel of a sensing array, the pixel comprising:

a thin film transistor, a capacitive sensing electrode, and a reference capacitor comprising a first plate and a second plate,

wherein the capacitive sensing electrode and the second plate of the reference capacitor are connected to a gate region of the thin film transistor,

wherein the gate region and the second plate of the reference capacitor are provided on a first layer of the structure.

2. The pixel structure of claim 1 , wherein the capacitive sensing electrode is separated from the first layer by an insulating layer.

3. The pixel structure of claim 1 wherein a source region and a drain region of the thin film transistor and the first plate of the reference capacitor are provided in a second layer of the layer structure.

4. The pixel structure of claim 2 wherein the gate region is connected to the capacitive sensing electrode by a conductive via through the insulating layer.

5. The pixel structure of claim 4 wherein the first layer is disposed between a second layer and the capacitive sensing electrode.

6. The pixel structure of claim 4 wherein the second layer is disposed between the first layer and the capacitive sensing electrode.

7. The pixel structure of claim 3 wherein the second layer comprises a channel region connecting the source region to the drain region, wherein the channel region and drain region connect the source region to an output of the pixel.

8. The pixel structure of claim 1 comprising an input for coupling a control voltage to the first plate of the reference capacitor for activating the pixel.

9. A pixel structure comprising a plurality of layers for providing a touch sensitive pixel of a sensing array, the pixel comprising:

a thin film transistor, a capacitive sensing electrode, and a reference capacitor comprising a first plate and a second plate,

wherein the capacitive sensing electrode and the second plate of the reference capacitor are connected to a gate region of the thin film transistor,

wherein the pixel structure comprises a dielectric shield comprising a first surface to be touched by an object to be sensed, and a second surface and wherein the capacitive sensing electrode is disposed between the second surface and the reference capacitor.

10. The pixel structure of claim 9 wherein the dielectric shield provides a substrate on which the layers of the structure are disposed.

11. A touch sensitive pixel for a touch sensing array, the pixel comprising:

a thin film transistor comprising:

a gate region, a source region, and a drain region, wherein the source region is separated from the drain region by a channel region;

a reference capacitor comprising a first plate and a second plate, and

a capacitive sensing electrode,

wherein the first plate of the reference capacitor is arranged for coupling to a control signal for activating the pixel, the source region is arranged for coupling to a reference signal input, and the second plate of the reference capacitor is connected to the gate region and to the capacitive sensing electrode;

a dielectric shield comprising a first surface to be touched by an object to be sensed, and a second surface;

wherein the capacitive sensing electrode is disposed adjacent the second surface and covered by an insulating layer and a conductive via through the insulating layer connects the capacitive sensing electrode to the gate electrode and to the second capacitor plate; and

wherein the second capacitor plate and the gate region are separated from the drain region, the source region and the channel region.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 21, 2025
From: TOUCH BIOMETRIX LIMITED
To: TOUCH BIOMETRIX B.V.
Reel/Frame 072627/0040 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 7, 2025
From: COWIN, MICHAEL
To: TOUCH BIOMETRIX LIMITED
Reel/Frame 070146/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 7, 2023
From: DERCKX, HENRICUS; VAN LIER, WILHELMUS
To: TOUCH BIOMETRIX LIMITED
Reel/Frame 064505/0972 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 3, 2021
From: MUNRO, HUGH SEMPLE; WOOD, CHRISTOPHER BARRY
To: THIRTY HOLDINGS LIMITED
Reel/Frame 058285/0340 →
Priority Claims (4)
GB 1907998 · Jun 5, 2019 · national
GB 1908040 · Jun 5, 2019 · national
GB 1909209 · Jun 26, 2019 · national
GB 1913912 · Sep 26, 2019 · national
Continuity (1)
Related Publication 20220238566A1 · Jul 28, 2022