IP Library Granted Patent US 11,705,929
Granted Patent B2
US 11,705,929 · App. 17/647,286 · Granted Jul 18, 2023

Integrated radio frequency transceiver

Inventors: Marzieh Veyseh (Los Altos, CA); Vahid M Toosi (Los Altos, CA); Saeid Mehrmanesh (San Jose, CA)
Assignee: SiTune Corporation
H04B1/0483H04B1/0475H04B1/10H04B2001/0491
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Quick Facts
Patent No.
US 11,705,929
App. No.
17/647,286
Granted
Jul 18, 2023
Kind
B2
Abstract

A direct digital radio having a high-speed RF front end in communication with an antenna, and a radio subsystem that can be configured to form a programmable multi-standard transceiver system. The high-speed RF front including RF inputs configured to receive a plurality of radio frequencies (e.g., frequencies between 400 MHz to 7.2 GHz, millimeter wave frequency signals, etc.) and wideband low noise amplifiers provides amplified signals to RF data converters, analog interfaces, digital interfaces, component interfaces, etc. The programmable multi-standard transceiver is operable in frequencies compatible with multiple networks such as private LTE and 5G networks as well as other wireless IoT standards and WiFi in multi-standard network access equipment. The programmable multi-standard transceiver can greatly reduce complexity for the baseband processing, lower the cost of the overall transceiver system, reduce power consumption, and at the same time, benefit from improvements on the digital functions through integration.

Claims (48)

1. An apparatus for receiving radio frequency (RF) signals, comprising:

a receive path for receiving receive signals, the receive path including a plurality of input signal ports, the plurality of input signal ports corresponding to a plurality of receive path segments, each receive path segment being coupled to a variable rate analog-to-digital converter (ADC),

a first receive path segment including,

a first low noise amplifier (LNA) and a first switch component configured to receive a first receive signal associated with a first frequency range and a first bandwidth,

wherein when the variable rate ADC is electrically coupled with the first switch component, the variable rate ADC operates at a first sampling rate that is assigned based on the first frequency range and the first bandwidth and generates a first digital signal, and

a second receive path segment including,

a second LNA and a second switch component configured to receive a second receive signal associated with a second frequency range and a second bandwidth,

wherein when the variable rate ADC is electrically coupled with the second switch component, the variable rate ADC operates at a second sampling rate that is assigned based on the second frequency range and the second bandwidth and generates a second digital signal, and

wherein the first receive path segment and the second receive path segment are provided on a single die, and wherein a first gain of the first LNA and a second gain of the second LNA is based on an output of the variable rate ADC.

2. The apparatus of claim 1 , further comprising:

a transmit path for transmitting a transmit signal, wherein the transmit path is provided on the single die.

3. The apparatus of claim 1 , further comprising:

a filter coupled to the first LNA, wherein the filter is a bandpass filter, the bandpass filter operable to pass frequencies satisfying a threshold bandwidth.

4. The apparatus of claim 1 , further comprising:

an automatic gain control (AGC) component configured to control a gain of the first LNA.

5. The apparatus of claim 1 , further comprising:

an ADC rate selection component, the ADC rate selection component configured to set a sampling rate of the variable rate ADC based on one of the first receive signal or the second receive signal.

6. The apparatus of claim 1 , further comprising:

a variable bandwidth digital signal processor (DSP) coupled to the variable rate ADC, wherein the variable bandwidth DSP is configured to operate in a frequency range of the plurality of receive path segments and is operable to generate variable bandwidth signals.

7. The apparatus of claim 6 , wherein the variable bandwidth digital signal processor includes a plurality of filters and a plurality of mixer components.

8. The apparatus of claim 1 , wherein the second bandwidth is at least a threshold times greater than the first bandwidth and the second frequency range is greater than the first frequency range, and wherein the second sampling rate is less than a highest frequency of the second receive signal.

9. The apparatus of claim 1 , further comprising:

a mixer component for decreasing a sample rate of receive signals,

wherein the receive path and the mixer component are provided on the single die.

10. The apparatus of claim 1 , wherein the apparatus is configured to:

determine the first frequency range associated with the first receive signal;

determine the first bandwidth associated with the first receive signal; and

determine the first sampling rate of the variable rate ADC based on the first bandwidth.

11. The apparatus of claim 1 , wherein the apparatus is configured to:

receive a sampling frequency parameter; and

use the sampling frequency parameter to set a sampling rate of the variable rate ADC.

12. The apparatus of claim 1 , wherein the variable rate ADC is coupled to a plurality of switches that includes the first switch component and the second switch component, individual switches being coupled to a respective RF input port, and wherein a switch is active when a corresponding RF input port is active, and wherein individual RF input ports operate within different frequency ranges.

13. The apparatus of claim 1 , further including a plurality of LNAs that includes the first LNA and the second LNA, individual LNAs corresponding to one of the plurality of receive path segments and configured for a frequency range and a bandwidth of a corresponding receive path.

14. The apparatus of claim 1 , further comprising a low noise amplifier module that includes the first LNA and the second LNA, the low noise amplifier module including a plurality of low noise amplifiers and configured to receive a range of frequency input signals.

15. The apparatus of claim 1 , wherein the apparatus is a small cell base station.

16. The apparatus of claim 1 , wherein the apparatus is a cellular transceiver.

17. The apparatus of claim 1 , wherein the apparatus is a programmable base station.

18. The apparatus of claim 1 , wherein the apparatus is operable in at least one of LTE network, 5G network, IoT network, or WiFi network.

19. The apparatus of claim 1 , wherein the apparatus is operable to provide access to at least one of video data, voice data, or Internet services.

20. A network access device, comprising:

a receive path for receiving receive signals, the receive path including a plurality of input signal ports, the plurality of input signal ports corresponding to a plurality of receive path segments, each receive path segment being coupled to a variable rate analog-to-digital converter (ADC),

a first receive path segment including,

a first low noise amplifier (LNA) and a first switch component configured to receive a first receive signal associated with a first frequency range and a first bandwidth,

wherein when the variable rate ADC is electrically coupled with the first switch component, the variable rate ADC operates at a first sampling rate that is assigned based on the first frequency range and the first bandwidth and generates a first digital signal, and

a second receive path segment including,

a second LNA and a second switch component configured to receive a second receive signal associated with a second frequency range and a second bandwidth,

wherein when the variable rate ADC is electrically coupled with the second switch component, the variable rate ADC operates at a second sampling rate that is assigned based on the second frequency range and the second bandwidth and generates a second digital signal, and

wherein the first receive path segment and the second receive path segment are provided on a single die, and wherein a first gain of the first LNA and a second gain of the second LNA is based on an output of the variable rate ADC.

Assignments (2)
CHANGE OF NAME Recorded Dec 14, 2023
From: SITUNE CORPORATION
To: ARCTIC SEMICONDUCTOR CORPORATION
Reel/Frame 065878/0242 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 10, 2022
From: VEYSEH, MARZIEH; TOOSI, VAHID M.; MEHRMANESH, SAEID
To: SITUNE CORPORATION
Reel/Frame 058613/0001 →
Continuity (2)
Continuation 17201980 · Mar 15, 2021
Related Publication 20220294480A1 · Sep 15, 2022