Switch with hysteresis
Switch circuitry including an input terminal ( 1 ), said input terminal connected to the base of a first transistor (Q 1 ) via a first resistor (R 3 ), said first transistor being an NPN Bipolar Gate Transistor (Q 1 ), said circuitry further comprising a second resistor (R 5 ) connected between the base of said first transistor (Q 1 ) and ground, and including an output line or terminal ( 3 ) connected to the collector of said first transistor (Q 1 ), and wherein the emitter of said first transistor (Q 1 ) is connected to ground (earth), said circuitry further including a second transistor (Q 2 ), said second transistor being a PNP Bipolar Gate Transistor, wherein the collector of said second transistor (Q 2 ) is connected via a third resistor (R 8 ) to the base of said first transistor (Q 1 ), and the emitter of said second transistor (Q 2 ) is connected to said input terminal ( 1 ), and wherein the emitter of said second transistor (Q 2 ) is additionally connected to the base of said second transistor (Q 2 ) via a fourth resistor (R 11 ); and the base of said second transistor (Q 2 ) being additionally connected to the output terminal ( 3 ) via a fifth resistor (R 10 ) and a diode (D 1 ).
1. Switch circuitry comprising an input terminal ( 1 ), said input terminal connected to the base of a first transistor (Q 1 ) via a first resistor (R 3 ), said first transistor being an NPN Bipolar Gate Transistor (Q 1 ), said circuitry further comprising a second resistor (R 5 ) connected between the base of said first transistor (Q 1 ) and ground, and including an output line or terminal ( 3 ) connected to the collector of said first transistor (Q 1 ), and wherein the emitter of said first transistor (Q 1 ) is connected to said ground (earth), said circuitry further including a second transistor (Q 2 ), said second transistor being a PNP Bipolar Gate Transistor, wherein the collector of said second transistor (Q 2 ) is connected via a third resistor (R 8 ) to the base of said first transistor (Q 1 ), and the emitter of said second transistor (Q 2 ) is connected to said input terminal ( 1 ), and wherein the emitter of said second transistor (Q 2 ) is additionally connected to the base of said second transistor (Q 2 ) via a fourth resistor (R 11 ); and the base of said second transistor (Q 2 ) being additionally connected to the output terminal ( 3 ) via a fifth resistor (R 10 ) and a diode (D 1 ).
2. Circuitry as claimed in claim 1 , wherein said diode (D 1 ) is electrically connected between said fourth resistor (R 10 ) and said output line or terminal ( 3 ).