Switch-mode power supplies including three-level LLC circuits

1. A method of manufacturing a switch-mode power supply comprising:

coupling a first switch with one of a second switch and a first diode to form a first half-bridge arrangement;

coupling a third switch with one of a fourth switch and a second diode to form a second half-bridge arrangement;

coupling the first half-bridge arrangement and the second half-bridge arrangement in a three-level LLC circuit arrangement between a voltage input and a voltage output, the three-level LLC circuit arrangement configured to convert an input voltage received via the voltage input to an output voltage supplied by the voltage output;

coupling a fifth switch across the one of the second switch and the first diode and the one of the fourth switch and the second diode;

coupling a control circuit with the fifth switch and configuring the control circuit to:

close the fifth switch to short circuit the one of the second switch and the first diode and the one of the fourth switch and the second diode when closed; and

operate the first half-bridge arrangement and the third switch with zero-voltage switching (ZVS).

2. The method of claim 1 further comprising:

coupling primary side of a transformer to the three-level LLC circuit arrangement;

coupling a secondary side of the transformer to a plurality of secondary switches coupled between the secondary side and the voltage output.

3. The method of claim 2 further comprising:

coupling a first capacitor and a first inductor between the primary side of the transformer and the first half-bridge arrangement; and

coupling a second capacitor and a second inductor between the primary side of the transformer and the second half-bridge arrangement.

4. The method of claim 3 , wherein the fifth switch is coupled between the first capacitor and the first half-bridge arrangement and between the second capacitor and the second half-bridge arrangement.

5. The method of claim 1 , wherein coupling the first half-bridge arrangement and the second half-bridge arrangement in the three-level LLC circuit arrangement comprises:

coupling a circuit ground between the first half-bridge arrangement and a first terminal of the voltage input;

coupling the circuit ground between the second half-bridge arrangement and a second terminal of the voltage input;

coupling a first capacitor between the first terminal and the circuit ground; and

coupling a second capacitor between the second terminal and the circuit ground.

6. The method of claim 5 , wherein a capacitance value of the first capacitor and a capacitance value of the second capacitor cause the input voltage to be divided equally across the first and second capacitors.

7. The method of claim 1 , wherein the control circuit comprises a voltage-controlled oscillator (VCO), a plurality of logic gates, and at least one flip-flop.

8. The method of claim 7 , wherein the control circuit further comprises a compensator, a phase comparator, and a delay circuit configured to provide a dead time to achieve the ZVS.

9. The method of claim 7 , wherein the at least one flip-flop comprises a D flip-flop; and

further comprising:

coupling the D flip-flop with an output of the VCO, the D flip-flop comprising a first output and a second output that is complementary to the first output;

coupling a first logic gate of the plurality of logic gates with the first output to generate a first control signal having a fifty percent duty cycle; and

coupling a second logic gate of the plurality of logic gates with the second output to generate a second control signal having a fifty percent duty cycle complementary of the first control signal.

10. The method of claim 9 , wherein the first half-bridge arrangement comprises the first diode;

wherein the second half-bridge arrangement comprises the second diode; and

further comprising:

coupling an output of the first logic gate to supply the first control signal to the first and third switches; and

coupling an output of the second logic gate to supply the second control signal to the fifth switch.

11. The method of claim 1 , wherein the first half-bridge arrangement comprises the second switch;

wherein the second half-bridge arrangement comprises the fourth switch; and

further comprising configuring the control circuit to:

turn on and turn off the first and third switches at the same time;

turn on and turn off the second and fourth switches at the same time;

turn on the fifth switch while the first, second, third, and fourth switches are turned off; and

turn off the fifth switch while the first, second, third, and fourth switches are turned on.

12. A method of controlling a switch-mode power supply, the switch-mode power supply comprising a first switch coupled with one of a second switch and a first diode to form a first half-bridge arrangement, a third switch coupled with one of a fourth switch and a second diode to form a second half-bridge arrangement, and a fifth switch across the one of the second switch and the first diode and the one of the fourth switch and the second diode, the method comprising:

closing the fifth switch to short circuit the one of the second switch and the first diode and the one of the fourth switch and the second diode when closed; and

operating the first half-bridge arrangement and the third switch with zero-voltage switching (ZVS);

wherein the first half-bridge arrangement and the second half-bridge arrangement are coupled in a three-level LLC circuit arrangement between a voltage input and a voltage output.

13. The method of claim 12 , wherein the first half-bridge arrangement comprises the second switch;

wherein the second half-bridge arrangement comprises the fourth switch; and

further comprising:

turning on and off the first and third switches at the same time;

turning on and off the second and fourth switches at the same time;

turning on the fifth switch while the first, second, third, and fourth switches are turned off; and

turning off the fifth switch while the first, second, third, and fourth switches are turned on.

14. The method of claim 13 further comprising:

turning on the first and third switches at the same time while the second and fourth switches are turned off; and

turning on the second and fourth switches at the same time while the first and third switches are turned off.

15. The method of claim 12 , wherein the first half-bridge arrangement comprises the first diode;

wherein the second half-bridge arrangement comprises the second diode; and

further comprising:

turning on and off the first and third switches at the same time;

turning on the fifth switch while the first and third switches are turned off; and

turning off the fifth switch while the first and third switches are turned on.

16. The method of claim 12 , wherein the control circuit comprises a voltage-controlled oscillator (VCO), a plurality of logic gates, and at least one flip-flop.

17. The method of claim 16 , wherein the control circuit further comprises a compensator, a phase comparator, and a delay circuit configured to provide a dead time to achieve the ZVS.

18. The method of claim 12 , wherein the switch-mode power supply further comprises:

a primary side of a transformer coupled to the first and second half-bridge arrangements; and

a secondary side of the transformer coupled to a plurality of secondary switches coupled between the secondary side and the voltage output.

19. The method of claim 18 , wherein the switch-mode power supply further comprises:

a first capacitor and a first inductor coupled between the primary side of the transformer and the first half-bridge arrangement; and

a second capacitor and a second inductor coupled between the primary side of the transformer and the second half-bridge arrangement.

20. The method of claim 19 , wherein the fifth switch is coupled between the first capacitor and the first half-bridge arrangement and between the second capacitor and the second half-bridge arrangement.