High-speed serial interface
A high-speed serial interface (HSIF) for communicating between an analog front end (AFE) and a radio via a bi-directional serial bit connection for an OFDM device.
1 . A communication device, comprising:
a digital signal processor (DSP) including a first high-speed serial interface (HSIF) configured to receive data from an analog front end (AFE), wherein the HSIF and the DSP reside on a same integrated circuit,
wherein the HSIF is configured to provide framed data that is 8b/10b-encoded and begins with a comma synchronization symbol,
wherein the data from the AFE comprising a control portion followed by a payload,
the data including at least one redundant byte for error detection, wherein the data comprising at least one status frame.
2 . The communication device of claim 1 wherein the data comprising an orthogonal frequency division multiplexed (OFDM) signal.
3 . The communication device of claim 1 wherein the data includes at least one frame, the data including at least one down converted digital sample that has been serialized.
4 . The communication device of claim 1 wherein the DSP comprises at least one of: a framer, or a deframer.
5 . The communication device of claim 4 wherein the AFE includes a second HSIF.
6 . The communication device of claim 4 , the AFE comprising a second framer/deframer and a SerDes.
7 . The communication device of claim 1 wherein one of the AFE or the DSP are configured to down convert two downstream OFDM channels at least at a 6 gigabit per second (Gbps) serial rate transfer.
8 . The communication device of claim 1 wherein one of the AFE or the DSP are configured to down convert one downstream OFDM channel at least at a 3 Gbps serial rate transfer.
9 . The communication device of claim 1 wherein the DSP includes a bi-directional serial interface, the communication device including a System on a Chip (SoC) coupled to the AFE via the bi-directional serial interface.
10 . The communication device of claim 1 wherein the data is compliant with a Data Over Cable Service Interface Specification (DOCSIS) 3.1.
11 . A device configured to communicate orthogonal frequency division multiplexed (OFDM) signals upstream and downstream with a network, the device comprising:
a first high speed serial interface (HSIF) to send and receive frames over a bi-directional serial connection to and from an analog front end (AFE) and a digital component in the form of status and data frames being 8b/10b-encoded and beginning with a comma synchronization symbol; and
a Serializer/Deserializer (SerDes).
12 . The device of claim 11 wherein when no data is needed to be transferred, status frames are provided in the data asynchronously as filler frames, the status and data frames comprising a control portion and a payload.
13 . The device of claim 11 wherein the data frames include at least one of: a frame sync, a header, or a data payload, wherein the data frames including an error detection portion.
14 . The device of claim 13 wherein the error detection portion comprises one of a cyclic redundancy check (CRC) or Reed Solomon (RS) forward error correction block code.
15 . The device of claim 11 wherein the first HSIF and the digital component reside on a same chip.
16 . The device of claim 15 wherein the digital component comprising a framer/deframer.
17 . The device of claim 16 wherein the first HSIF includes a bi-directional serial interface, wherein the digital component comprises a System on a Chip (SoC) coupled to the AFE via the first HSIF.
18 . The device of claim 17 wherein the device comprises a cable compliant with a Data Over Cable Service Interface Specification (DOCSIS) 3.1 standard.
19 . The device of claim 11 wherein the digital component is configured to sample, frame and serialize upstream data to send to the AFE at a 600 Mega samples per second (Msps) rate for 15-bit real samples fed least significant bit (LSB) first to most significant bit (MSB).