IP Library Granted Patent US 12,142,475
Granted Patent B2
US 12,142,475 · App. 17/667,704 · Granted Nov 12, 2024

Sequential plasma and thermal treatment

Inventors: Ning Li (San Jose, CA); Shuaidi Zhang (San Jose, CA); Mihaela A. Balseanu (Sunnyvale, CA); Qi Gao (Wilmington, MA); Rajesh Prasad (Lexington, MA); Tomohiko Kitajima (San Jose, CA); Chang Seok Kang (Santa Clara, CA); Deven Matthew Raj Mittal (Middleton, MA); Kyu-Ha Shim (Andover, MA)
Assignee: Applied Materials, Inc.
H01L21/0217C23C16/345C23C16/56H01L21/02123H01L21/0234H01L21/02345H10B41/27H10B41/35H10B43/35H01L21/0228H10B43/27
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Quick Facts
Patent No.
US 12,142,475
App. No.
17/667,704
Granted
Nov 12, 2024
Kind
B2
Abstract

Methods of manufacturing memory devices are provided. The methods improve the quality of a selectively deposited silicon-containing dielectric layer. The method comprises selectively depositing a silicon-containing dielectric layer in a recessed region of a film stack. The selectively deposited silicon-containing dielectric layer is then exposed to a high-density plasma and annealed at a temperature greater than 800 ° C. to provide a silicon-containing dielectric film having a wet etch rate of less than 4 Å/min.

Claims (25)

1. A processing method comprising:

selectively depositing a silicon-containing dielectric layer in a recessed region of a film stack, the film stack comprising alternating layers of a first material layer and a second material layer and having a memory hole extending through the film stack;

exposing the silicon-containing dielectric layer to a high-density plasma at a temperature less than or equal to 500° C. and at a pressure less than 1 Torr; and

annealing the silicon-containing dielectric layer at a temperature greater than 800° C. to provide a silicon-containing dielectric film having a wet etch rate of less than 4 Å/min.

2. The method of claim 1 , wherein the second material layer comprises an oxide layer.

3. The method of claim 1 , wherein the recessed region is formed by recessing the first material layer relative to the second material layer through the memory hole.

4. The method of claim 1 , wherein the first material layer comprises one or more of polysilicon, silicon nitride, silicon carbide, silicon carbonitride, germanium, and titanium nitride.

5. The method of claim 1 , wherein the silicon-containing dielectric layer comprises one or more of silicon nitride (SiN), silicon carbonitride (SiCN), silicon oxynitride, silicon oxycarbonitride, silicon boride (SiB), and silicon boron nitride (SiBN).

6. The method of claim 5 , wherein the silicon-containing dielectric layer comprises silicon nitride.

7. The method of claim 1 , wherein selectively depositing the silicon-containing dielectric layer comprises deposition at a temperature less than 500° C.

8. The method of claim 1 , wherein the silicon-containing dielectric film has a wet etch rate of less than 1 Å/min.

9. The method of claim 1 , wherein the high-density plasma is selected from one or more of helium (He), hydrogen (H 2 ), neon (Ne), argon (Ar), krypton (Kr), and xenon (Xe).

10. The method of claim 1 , wherein the silicon-containing dielectric film has a thickness in a range of from greater than 0 Å to 25 Å.

11. The method of claim 1 , wherein the method is performed in a processing chamber without breaking vacuum.

12. A non-transitory computer readable medium including instructions, that, when executed by a controller of a processing chamber, causes the processing chamber to perform the operations of:

selectively deposit a silicon-containing dielectric layer in a recessed region of a film stack, the film stack comprising alternating layers of a first material layer and a second material layer and having a memory hole extending through the film stack;

expose the silicon-containing dielectric layer to a high-density plasma at a temperature less than or equal to 500° C. and at a pressure less than 1 Torr; and

anneal the silicon-containing dielectric layer at a temperature greater than 800° C. to provide a silicon-containing dielectric film having a wet etch rate of less than 4 Å/min.

13. The non-transitory computer readable medium of claim 12 , wherein the first material layer comprises an oxide layer.

14. The non-transitory computer readable medium of claim 12 , wherein the recessed region is formed by recessing the second material layer relative to the first material layer through the memory hole.

15. The non-transitory computer readable medium of claim 12 , wherein the second material layer comprises one or more of polysilicon, silicon nitride, silicon carbide, silicon carbonitride, germanium, and titanium nitride.

16. The non-transitory computer readable medium of claim 12 , wherein the silicon-containing dielectric layer comprises one or more of silicon nitride (SiN), silicon carbonitride (SiCN), silicon oxynitride, silicon oxycarbonitride, silicon boride (SiB), and silicon boron nitride (SiBN).

17. The non-transitory computer readable medium of claim 16 , wherein the silicon-containing dielectric layer comprises silicon nitride.

18. The non-transitory computer readable medium of claim 12 , wherein selectively depositing the silicon-containing dielectric layer comprises deposition at a temperature less than 500 ° C.

19. The non-transitory computer readable medium of claim 12 , wherein the high -density plasma is selected from one or more of helium (He), hydrogen (H 2 ), neon (Ne), argon (Ar), krypton (Kr), and xenon (Xe).

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 11, 2022
From: LI, NING; ZHANG, SHUAIDI; BALSEANU, MIHAELA A.; GAO, QI; PRASAD, RAJESH; KITAJIMA, TOMOHIKO; KANG, CHANG SEOK; MITTAL, DEVEN MATTHEW RAJ; SHIM, KYU-HA
To: APPLIED MATERIALS, INC.
Reel/Frame 059894/0248 →