IP Library Granted Patent US 11,573,259
Granted Patent B1
US 11,573,259 · App. 17/695,980 · Granted Feb 7, 2023

Quantum error-correction in microwave integrated quantum circuits

Inventors: William J. Zeng (Berkeley, CA); Eyob A. Sete (Walnut Creek, CA); Chad Tyler Rigetti (Walnut Creek, CA)
Assignee: Rigetti & Co, LLC
G01R31/2851G06N10/00
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Quick Facts
Patent No.
US 11,573,259
App. No.
17/695,980
Granted
Feb 7, 2023
Kind
B1
Abstract

In a general aspect, a quantum error-correction technique includes applying a first set of two-qubit gates to qubits in a lattice cell, and applying a second, different set of two-qubit gates to the qubits in the lattice cell. The qubits in the lattice cell include data qubits and ancilla qubits, and the ancilla qubits reside between respective nearest-neighbor pairs of the data qubits. After the first and second sets of two-qubit gates have been applied, measurement outcomes of the ancilla qubits are obtained, and the parity of the measurement outcomes is determined.

Claims (16)

1. A quantum information control method for performing a two-qubit gate, the method comprising:

generating, by operation of a control system, a control sequence configured to apply a two-qubit gate to a first qubit and a second qubit, the first qubit defined by a first device having a first operating frequency in a quantum processor cell, the second qubit defined by a second device having a second operating frequency in the quantum processor cell, the control sequence comprising a tuning pulse for the first device; and

sending the control sequence comprising the tuning pulse to the quantum processor cell, wherein sending the tuning pulse to the quantum processor cell tunes the first operating frequency toward a transition frequency of the second device to produce a quantum interaction between the first device and the second device;

wherein the two-qubit gate comprises an arbitrary iSWAP exponent gate.

2. The method of claim 1 , wherein the first device comprises a fluxonium device, and the second device comprises a transmon device.

3. The method of claim 1 , wherein the tuning pulse lowers the first operating frequency to the second operating frequency to produce the quantum interaction.

4. The method of claim 1 , wherein the tuning pulse raises the first operating frequency to a transition frequency other than the second operating frequency to produce the quantum interaction.

5. A quantum computing system comprising:

a quantum processor cell comprising a first device and a second device in a device lattice, the first device having a first operating frequency and defining a first qubit, the second device having a second operating frequency and defining a second qubit; and

a control system communicably coupled to the quantum processor cell to control the device lattice, the control system configured to:

generate a control sequence to apply a two-qubit gate to the first qubit and the second qubit, the control sequence comprising a tuning pulse; and

send the control sequence comprising the tuning pulse to the quantum processor cell, wherein sending the tuning pulse to the quantum processor cell tunes the first operating frequency toward a transition frequency of the second device to produce a quantum interaction between the first device and the second device;

wherein the two-qubit gate comprises an arbitrary iSWAP exponent gate.

6. The quantum computing system of claim 5 , wherein the first device comprises a fluxonium device, and the second device comprises a transmon device.

7. The quantum computing system of claim 5 , wherein sending the tuning pulse to the quantum processor cell lowers the first operating frequency to the second operating frequency to produce the quantum interaction.

8. The quantum computing system of claim 5 , wherein sending the tuning pulse to the quantum processor cell raises the first operating frequency to a transition frequency other than the second operating frequency to produce the quantum interaction.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Dec 12, 2024
From: TRINITY CAPITAL INC.
To: RIGETTI & CO, LLC
Reel/Frame 069603/0771 →
RELEASE OF SECURITY INTEREST Recorded Dec 12, 2024
From: TRINITY CAPITAL INC.
To: RIGETTI & CO, LLC; RIGETTI INTERMEDIATE LLC; RIGETTI COMPUTING, INC.
Reel/Frame 069603/0831 →
AMENDED AND RESTATED INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Jul 8, 2024
From: RIGETTI & CO, LLC; RIGETTI INTERMEDIATE LLC; RIGETTI COMPUTING, INC.
To: TRINITY CAPITAL INC.
Reel/Frame 068146/0416 →
CHANGE OF NAME Recorded May 17, 2022
From: RIGETTI & CO, INC.
To: RIGETTI & CO, LLC
Reel/Frame 060983/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 17, 2022
From: ZENG, WILLIAM J.; SETE, EYOB A.; RIGETTI, CHAD T.
To: RIGETTI & CO., INC
Reel/Frame 059289/0586 →
Cited By (1)
US 12,510,586