IP Library Granted Patent US 12,057,813
Granted Patent B2
US 12,057,813 · App. 17/700,685 · Granted Aug 6, 2024

Wideband transmission circuit

Inventors: Nadim Khlat (Cugnaux, FR); James M. Retz (Cedar Rapids, IA)
Assignee: Qorvo US, Inc.
H03F1/0233H03F3/245H04B1/0475H04B1/40H04B1/69H04L25/03828H04L25/03993H03F2200/102H03F2200/451H04B2001/0425
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Quick Facts
Patent No.
US 12,057,813
App. No.
17/700,685
Granted
Aug 6, 2024
Kind
B2
Abstract

A wideband transmission circuit is provided. The wideband transmission circuit includes a transceiver circuit and a power amplifier circuit(s). The transceiver circuit generates a radio frequency (RF) signal(s) from a time-variant input vector and provides the RF signal(s) to the power amplifier circuit(s). The power amplifier circuit(s) amplifies the RF signal(s) based on a modulated voltage and provides the amplified RF signal(s) to a coupled RF front-end circuit (e.g., filter/multiplexer circuit). In embodiments disclosed herein, the transceiver circuit is configured to apply an equalization filter to the time-variant input vector to thereby compensate for a voltage distortion filter caused by a coupling of the power amplifier circuit(s) and the RF front-end circuit. As a result, it is possible to reduce undesired instantaneous excessive compression and/or spectrum regrowth resulting from the voltage distortion filter to thereby improve efficiency and linearity of the power amplifier circuit(s).

Claims (50)

1. A wideband transmission circuit comprising:

a power amplifier circuit coupled to a transmitter circuit via a radio frequency (RF) front-end circuit and configured to amplify an RF signal based on a modulated voltage and provide the amplified RF signal to the RF front-end circuit;

an envelope tracking (ET) integrated circuit (ETIC) configured to generate the modulated voltage based on a modulated target voltage; and

a transceiver circuit comprising:

a signal processing circuit configured to generate the RF signal from a time-variant input vector;

a target voltage circuit configured to detect a time-variant amplitude envelope of the RF signal from the time-variant input vector and generate the modulated target voltage based on the detected time-variant amplitude envelope; and

an equalizer circuit configured to apply an equalization filter to the time-variant input vector to compensate for a voltage distortion filter created on an output stage of the power amplifier circuit by coupling the power amplifier circuit with the RF front-end circuit, wherein the voltage distortion filter is a function of a reflection coefficient applied to the power amplifier circuit and a reflection coefficient applied to the RF front-end circuit.

2. The wideband transmission circuit of claim 1 , wherein the equalization filter is configured to match a combined signal path filter that includes a transfer function of the signal processing circuit, a voltage gain transfer function of the power amplifier circuit, and the voltage distortion filter.

3. The wideband transmission circuit of claim 2 , wherein:

the equalizer circuit is further configured to apply the equalization filter to the time-variant input vector to generate an equalized time-variant input vector; and

the target voltage circuit is further configured to detect the time-variant amplitude envelope from the equalized time-variant input vector.

4. The wideband transmission circuit of claim 3 , wherein the target voltage circuit comprises:

an amplitude detector circuit configured to detect the time-variant amplitude envelope from the equalized time-variant input vector;

an ET lookup table (LUT) circuit configured to generate a time-variant digital target voltage based on the detected time-variant amplitude envelope; and

a digital-to-analog converter (DAC) configured to convert the time-variant digital target voltage into the modulated target voltage.

5. The wideband transmission circuit of claim 3 , wherein the signal processing circuit comprises:

a memory digital predistortion (mDPD) circuit configured to digitally pre-distort the time-variant input vector to generate a pre-distorted time-variant input vector; and

a modulator circuit configured to generate the RF signal from the pre-distorted time-variant input vector and provide the RF signal to the power amplifier circuit.

6. The wideband transmission circuit of claim 5 , wherein the mDPD circuit is further configured to digitally pre-distort the time-variant input vector based on the detected time-variant amplitude envelope.

7. The wideband transmission circuit of claim 3 , wherein the equalization filter is expressed as: H ET (s)=H IQ (s)*H PA (s)*H IV (s), wherein:

H ET (s) represents the equalization filter;

H IQ (s) represents the transfer function of the signal processing circuit;

H PA (s) represents the voltage gain transfer function of the power amplifier circuit; and

H IV (s) represents the voltage distortion filter.

8. The wideband transmission circuit of claim 7 , wherein the voltage distortion filter is expressed as: H IV (s)=½*[1−T PA (s)*T I (s)/[1−T PA (s)]*T I (s)], wherein:

T PA (s) represents the reflection coefficient applied to the power amplifier circuit; and

T I (s) represents the reflection coefficient applied to the RF front-end circuit.

9. The wideband transmission circuit of claim 8 , wherein:

the transceiver circuit further comprises a coefficient lookup table (LUT) configured to store the reflection coefficient applied to the power amplifier circuit and the reflection coefficient applied to the RF front-end circuit; and

the equalizer circuit is further configured to dynamically create the equalization filter based on the coefficient LUT.

10. The wideband transmission circuit of claim 2 , wherein:

the equalizer circuit is further configured to apply the equalization filter to the time-variant input vector to generate an equalized time-variant input vector; and

the signal processing circuit is further configured to generate the RF signal from the equalized time-variant input vector.

11. The wideband transmission circuit of claim 10 , wherein the signal processing circuit comprises:

a memory digital predistortion (mDPD) circuit configured to digitally pre-distort the equalized time-variant input vector to generate a pre-distorted equalized time-variant input vector; and

a modulator circuit configured to generate the RF signal from the pre-distorted equalized time-variant input vector and provide the RF signal to the power amplifier circuit.

12. The wideband transmission circuit of claim 11 , wherein the mDPD circuit is further configured to digitally pre-distort the equalized time-variant input vector based on the detected time-variant amplitude envelope.

13. The wideband transmission circuit of claim 10 , wherein the target voltage circuit comprises:

an amplitude detector circuit configured to detect the time-variant amplitude envelope from the time-variant input vector;

an ET lookup table (LUT) circuit configured to generate a time-variant digital target voltage based on the detected time-variant amplitude envelope; and

a digital-to-analog converter (DAC) configured to convert the time-variant digital target voltage into the modulated target voltage.

14. The wideband transmission circuit of claim 10 , wherein the equalization filter is expressed as: 1/H ET (s)=1/[H IQ (s)*H PA (s)*H IV (s)], wherein:

H ET (s) represents the equalization filter;

H IQ (s) represents the transfer function of the signal processing circuit;

H PA (s) represents the voltage gain transfer function of the power amplifier circuit; and

H IV (s) represents the voltage distortion filter.

15. The wideband transmission circuit of claim 14 , wherein the voltage distortion filter is expressed as: H IV (s)=½*[1−T PA (s)]*[1+T I (s)]/[1−T PA (s)*T I (s)], wherein:

T PA (s) represents the reflection coefficient applied to the power amplifier circuit; and

T I (s) represents the reflection coefficient applied to the RF front-end circuit.

16. The wideband transmission circuit of claim 1 , wherein the RF front-end circuit comprises one or more of: a filter circuit and a multiplexer circuit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 22, 2022
From: KHLAT, NADIM; RETZ, JAMES M.
To: QORVO US, INC.
Reel/Frame 059336/0221 →
Continuity (2)
Provisional Application 63212418 · Jun 18, 2021
Related Publication 20220407463A1 · Dec 22, 2022
Cited By (2)
US 12,456,957 US 12,526,001