Automatic systems devices rediscovery
A method for automatic systems devices rediscovery includes creating a hardware map of hardware components of a computing system at a time when each of the hardware components of the computing system is discoverable. The method includes determining discoverability of each hardware component in the hardware map at a point in time after creation of the hardware map, and in response to determining that a hardware component listed in the hardware map is not discoverable, initiating a reset of the hardware component.
1. A method comprising:
creating a hardware map of hardware components of a computing system at a time when each of the hardware components of the computing system is discoverable;
determining discoverability of each hardware component in the hardware map at a point in time after creation of the hardware map;
in response to determining that a hardware component listed in the hardware map is not discoverable, initiating a reset of the hardware component;
determining if the hardware component is discoverable after the reset;
initiating a normal operating mode in response to determining that the hardware component is discoverable after the reset;
repeating resetting the hardware component in response to determining that the hardware component is not discoverable;
incrementing a reset counter each time the hardware component is determined to be not discoverable in response to resetting the hardware component; and
sending an alert to a system administrator in response to the reset counter reaching a reset threshold.
2. The method of claim 1 , further comprising:
initiating a reset of an upstream hardware component located upstream of the hardware component that is not discoverable after the reset of the hardware component that is not discoverable and prior to sending the alert; and
determining if the hardware component is discoverable in response to the reset of the upstream hardware component,
wherein the alert is sent in response to determining that the hardware component is not discoverable after the reset of the upstream hardware component.
3. The method of claim 1 , wherein determining discoverability of each hardware component in the hardware map is in response to a startup event.
4. The method of claim 3 , wherein the startup event is one of a return to operation after a sleep mode, a return to operation after a soft start, or a return to operation after a full reset.
5. The method of claim 1 , wherein determining discoverability of each hardware component in the hardware map occurs during a normal operating mode.
6. The method of claim 5 , wherein initiating the reset of the hardware component, upstream hardware components, and/or a full reset is in response to preparing operation of the computing system for a reset.
7. The method of claim 1 , wherein the computing system is controlled via a baseboard management controller (“BMC”), and wherein creating the hardware map, determining discoverability of the hardware components of the computing system and initiating the reset of the hardware component that is not discoverable are controlled by the BMC.
8. The method of claim 1 , wherein creation of the hardware map is triggered:
by a system administrator;
in response to addition of a hardware component to the computing system; and/or
in response to removal of a hardware component to the computing system.
9. An apparatus comprising:
a processor; and
a non-volatile memory storing code, the code being executable by the processor to perform operations comprising:
creating a hardware map of hardware components of a computing system at a time when each of the hardware components of the computing system is discoverable;
determining discoverability of each hardware component in the hardware map at a point in time after creation of the hardware map;
in response to determining that a hardware component listed in the hardware map is not discoverable, initiating a reset of the hardware component;
determining if the hardware component is discoverable after the reset;
initiating a normal operating mode in response to determining that the hardware component is discoverable after the reset;
repeating resetting the hardware component in response to determining that the hardware component is not discoverable;
incrementing a reset counter each time the hardware component is determined to be not discoverable in response to resetting the hardware component; and
sending an alert to a system administrator in response to the reset counter reaching a reset threshold.
10. The apparatus of claim 9 , wherein the operations further comprise:
initiating a reset of an upstream hardware component located upstream of the hardware component that is not discoverable after the reset of the hardware component that is not discoverable and prior to sending the alert; and
determining if the hardware component is discoverable in response to the reset of the upstream hardware component,
wherein the alert is sent in response to determining that the hardware component is not discoverable after the reset of the upstream hardware component.
11. The apparatus of claim 9 , wherein determining discoverability of each hardware component in the hardware map is in response to a startup event.
12. The apparatus of claim 11 , wherein the startup event is one of a return to operation after a sleep mode, a return to operation after a soft start, or a return to operation after a full reset.
13. The apparatus of claim 9 , wherein the computing system is controlled via a baseboard management controller (“BMC”), and wherein creating the hardware map, determining discoverability of the hardware components of the computing system and initiating the reset of the hardware component that is not discoverable are controlled by the BMC.
14. The apparatus of claim 9 , wherein creation of the hardware map is triggered:
by a system administrator;
in response to addition of a hardware component to the computing system; and/or
in response to removal of a hardware component to the computing system.
15. A program product comprising a non-volatile computer readable storage medium storing code, the code being configured to be executable by a processor to perform operations comprising:
creating a hardware map of hardware components of a computing system at a time when each of the hardware components of the computing system is discoverable;
determining discoverability of each hardware component in the hardware map at a point in time after creation of the hardware map;
in response to determining that a hardware component listed in the hardware map is not discoverable, initiating a reset of the hardware component;
determining if the hardware component is discoverable after the reset;
initiating a normal operating mode in response to determining that the hardware component is discoverable after the reset;
repeating resetting the hardware component in response to determining that the hardware component is not discoverable;
incrementing a reset counter each time the hardware component is determined to be not discoverable in response to resetting the hardware component; and
sending an alert to a system administrator in response to the reset counter reaching a reset threshold.