IP Library Granted Patent US 11,901,927
Granted Patent B2
US 11,901,927 · App. 17/713,587 · Granted Feb 13, 2024

Dynamic range extension of radio frequency signals using phasing of two or more IQ channels

Inventors: Nikhil Ashok Deshmukh (Bangalore, IN); Michael Loehning (Dresden, DE)
Assignee: National Instruments Corporation
H04B1/16
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Quick Facts
Patent No.
US 11,901,927
App. No.
17/713,587
Granted
Feb 13, 2024
Kind
B2
Abstract

Dynamic range of radio frequency transmitters and receivers may be improved via a multiple-channel phasor configuration in which channels are phased in a manner that distributes the local oscillator phases over π/2 radians. A multiple-channel phasing receiver may include a power splitter to split an input signal into multiple signals, and may further include multiple single-channel receivers providing intermediate signals. Each single-channel receiver may have an input that receives a respective signal of the multiple signals, and may further have an output to provide a respective intermediate signal as a function of the respective input signal, a total gain applied to the respective input signal, a signal frequency of the local oscillator signal, and a respective phase of the local oscillator signal. The multiple-channel receiver may include a digital signal processor that combines the plurality of intermediate signals into a single output signal. A multiple-channel transmitter/transceiver may be similarly implemented.

Claims (69)

1. A multiple-channel phasing receiver comprising:

a splitter circuit configured to split an input signal into a plurality of signals;

a plurality of single-channel receivers configured to provide a corresponding plurality of intermediate signals, each single-channel receiver of the plurality of single-channel receivers having:

an input configured to receive a corresponding respective signal of the plurality of signals; and

an output configured to provide a corresponding respective intermediate signal of the plurality of intermediate signals, wherein the respective intermediate signal is a function of at least:

the corresponding respective signal; and

a corresponding respective phase of a plurality of phases of a local oscillator signal; and

a digital signal processor configured to combine the plurality of intermediate signals into a single output signal;

wherein the plurality of phases of the local oscillator signal is distributed over π/2 radians.

2. The multiple-channel phasing receiver of claim 1 , wherein the corresponding respective intermediate signal is further a function of at least one of:

a total gain applied to the corresponding respective signal; or

a signal frequency of the local oscillator signal.

3. The multiple-channel phasing receiver of claim 2 , wherein a value of the total gain is determined such that it compensates for a loss due to the splitter circuit.

4. The multiple-channel phasing receiver of claim 1 , wherein at least one single-channel receiver of the plurality of single-channel receivers includes one of:

a direct conversion receiver; or

a heterodyne receiver.

5. The multiple-channel phasing receiver of claim 4 , wherein the heterodyne receiver features one of:

a non-zero intermediate frequency (IF);

a last stage that uses a low IF; or

a last stage that uses a zero IF.

6. The multiple-channel phasing receiver of claim 1 , wherein the multiple-channel phasing receiver is configured to operate on complex signals centered around an intermediate frequency.

7. The multiple-channel phasing receiver of claim 1 , wherein the plurality of phases of the local oscillator signal includes an arbitrary starting phase.

8. The multiple-channel phasing receiver of claim 1 , wherein each single-channel receiver includes a single in-phase/quadrature (IQ) channel.

9. The multiple-channel phasing receiver of claim 1 , wherein the single output signal is a digital representation of the input signal.

10. The multiple-channel phasing receiver of claim 1 , wherein distributing the plurality of phases of the local oscillator signal and performing digital to analog conversion in the plurality of single-channel receivers enables a higher input signal range for analog to digital conversion without signal information loss in the single output signal, relative to a full-scale input signal range of a single respective analog to digital converter used in each single-channel receiver.

11. The multiple-channel phasing receiver of claim 1 , wherein the plurality of intermediate signals being combined into a single output signal provides additional signal-to-noise ratio gain for the multiple-channel phasing receiver.

12. A multiple-channel phasing transmitter comprising:

a phasor splitter configured to split an input signal into a plurality of signals;

a plurality of single-channel transmitters configured to provide a corresponding plurality of intermediate signals, each single-channel transmitter of the plurality of single-channel transmitters having:

an input configured to receive a corresponding respective signal of the plurality of signals; and

an output configured to provide a corresponding respective intermediate signal of the plurality of intermediate signals, wherein the respective intermediate signal is a function of at least:

the corresponding respective signal; and

a corresponding respective phase of a plurality of phases of a local oscillator signal; and

a summing circuit configured to add the plurality of intermediate signals into a single output signal;

wherein the plurality of phases of the local oscillator signal is distributed over π/2 radians.

13. The multiple-channel phasing transmitter of claim 12 , wherein the corresponding respective intermediate signal is further a function of at least one of:

a total gain applied to the corresponding respective signal; or

a signal frequency of the local oscillator signal.

14. The multiple-channel phasing transmitter of claim 12 , wherein the plurality of phases of the local oscillator signal includes an arbitrary starting phase.

15. The multiple-channel phasing transmitter of claim 12 , wherein each single-channel transmitter includes a single in-phase/quadrature (IQ) channel.

16. A transceiver comprising:

a multiple-channel phasing receiver circuit comprising:

a splitter circuit configured to split a receive signal into a plurality of first signals;

a plurality of single-channel receivers configured to provide a corresponding plurality of first intermediate signals, each single-channel receiver of the plurality of single-channel receivers having:

an input configured to receive a corresponding respective first signal of the plurality of first signals; and

an output configured to provide a corresponding respective first intermediate signal of the plurality of first intermediate signals, wherein the respective first intermediate signal is a function of at least:

the corresponding respective first signal; and

a corresponding respective phase of a first plurality of phases of a local oscillator signal; and

a digital signal processor configured to combine the plurality of first intermediate signals into a single output receive signal;

wherein the first plurality of phases of the local oscillator signal is distributed over π/2 radians; and

a multiple-channel phasing transmitter circuit comprising:

a phasor splitter configured to split a transmit signal into a plurality of second signals;

a plurality of single-channel transmitters configured to provide a corresponding plurality of second intermediate signals, each single-channel transmitter of the plurality of single-channel transmitters having:

an input configured to receive a corresponding respective second signal of the plurality of second signals; and

an output configured to provide a corresponding respective second intermediate signal of the plurality of second intermediate signals, wherein the respective second intermediate signal is a function of at least:

the correspond respective second signal; and

a corresponding respective phase of a second plurality of phases of the local oscillator signal; and

a summing circuit configured to add the plurality of second intermediate signals into a single output transmit signal;

wherein the second plurality of phases of the local oscillator signal is distributed over π/2 radians.

17. The transceiver of claim 16 ;

wherein the corresponding respective first intermediate signal is further a function of at least one of:

a total gain applied to the corresponding respective first signal; or

a signal frequency of the local oscillator signal; and

wherein the corresponding respective second intermediate signal is further a function of at least one or more of:

a total gain applied to the corresponding respective second signal; or

a signal frequency of the local oscillator signal.

18. The transceiver of claim 16 , wherein either one or both of the first plurality of phases of the local oscillator signal and the second plurality of phases of the local oscillator signal include an arbitrary starting phase.

19. The transceiver of claim 16 , wherein each single-channel transmitter includes a single in-phase/quadrature (IQ) channel and each single-channel receiver includes a single in-phase/quadrature (IQ) channel.

20. The transceiver of claim 16 , wherein the multiple-channel phasing receiver circuit is configured to operate on complex signals centered around a non-zero intermediate frequency.

Assignments (2)
RELEASE OF SECURITY INTEREST IN PATENTS Recorded Oct 13, 2023
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
To: NATIONAL INSTRUMENTS CORPORATION
Reel/Frame 065231/0561 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 21, 2022
From: DESHMUKH, NIKHIL ASHOK; LOEHNING, MICHAEL
To: NATIONAL INSTRUMENTS CORPORATION
Reel/Frame 059658/0638 →