IP Library Granted Patent US 12,019,891
Granted Patent B2
US 12,019,891 · App. 17/728,921 · Granted Jun 25, 2024

Memory controller controlling synchronization operation based on fused linked list and operating method thereof

Inventor: Eu Joon Byun (Gyeonggi-do, KR)
Assignee: SK hynix Inc.
G06F3/0644G06F3/0604G06F3/0673G06F16/9024
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Quick Facts
Patent No.
US 12,019,891
App. No.
17/728,921
Granted
Jun 25, 2024
Kind
B2
Abstract

Embodiments of the present disclosure relate to a memory controller and operating method thereof. According to embodiments of the present disclosure, the memory controller may generate a fused linked list which includes information of a plurality of write commands received from a host and a plurality of synchronization commands requesting a synchronization operation, and control the synchronization operation for one or more of the plurality of write commands based on the fused linked list.

Claims (20)

1. A memory controller, comprising:

generating a fused linked list which includes information of a plurality of write commands received from a host and a plurality of synchronization commands requesting a synchronization operation, wherein the synchronization operation is an operation for completing storage of data in a memory device, the data being requested to be written by one or more of the plurality of write commands, and

controlling the synchronization operation for one or more of the plurality of write commands based on the fused linked list,

wherein the fused linked list includes a head node indicating a start position of the fused linked list, a plurality of write command nodes each of which corresponds to one of the plurality of write commands and a plurality of synchronization command nodes each of which corresponds to one of the plurality of synchronization commands,

wherein the memory controller further comprising accessing, within the fused linked list, a first write command node, which corresponds to one of the write commands that are to be synchronized by a first target synchronization command among the plurality of synchronization commands, by traversing a path defined by pointers of nodes from the head node to a first target synchronization command node disposed at an endpoint of the path traversed, which corresponds to the first target synchronization command.

2. The memory controller according to claim 1 , wherein the fused linked list is a double linked list.

3. The memory controller according to claim 1 , further comprising accessing, within the fused linked list, a second write command node, which corresponds to one of the write commands that are not to be synchronized by the first target synchronization command but to be synchronized by a second target synchronization command among the plurality of synchronization commands, by traversing a path defined by pointers of nodes from the first target synchronization command node to a second target synchronization command node, which corresponds to the second target synchronization command.

4. The memory controller according to claim 3 , further comprising accessing, within the fused linked list, the first target synchronization command node by traversing a path defined by pointers of nodes from the head node to the second target synchronization commands node.

5. The memory controller according to claim 4 , further comprising removing, from the fused linked list, a target write command node, which is located on the path defined by the pointers of nodes from the first target synchronization command node to the second target synchronization command node, after the synchronization operation for a write command corresponding to the target write command node is completed among the plurality of write commands.

6. The memory controller according to claim 1 , further comprising removing, from the fused linked list, the first target synchronization command node when there is no write command node located on the path defined by the pointers of nodes from the head node to the first target synchronization command node.

7. A method for operating a memory controller, the method comprising:

generating a fused linked list which includes information of a plurality of write commands received from a host and a plurality of synchronization commands requesting a synchronization operation, wherein the synchronization operation is an operation of completing storage of data in a memory device, the data being requested to be written by one or more of the plurality of write commands, and

controlling the synchronization operation for one or more of the plurality of write commands based on the fused linked list,

wherein the fused linked list includes a head node indicating a start position of the fused linked list, a plurality of write command nodes each of which corresponds to one of the plurality of write commands and a plurality of synchronization command nodes each of which corresponds to one of the plurality of synchronization commands,

wherein the method further comprising accessing, within the fused linked list, a first write command node, which corresponds to one of the write commands that are to be synchronized by a first target synchronization command among the plurality of synchronization commands, by traversing a path defined by pointers of nodes from the head node to a first target synchronization command node disposed at an endpoint of the path traversed, which corresponds to the first target synchronization command.

8. The method according to claim 7 , wherein the fused linked list is a double linked list.

9. The method according to claim 7 , further comprising accessing, within the fused linked list, a second write command node, which corresponds to one of the write commands that are not to be synchronized by the first target synchronization command but to be synchronized by a second target synchronization command among the plurality of synchronization commands, by traversing a path defined by pointers of nodes from the first target synchronization command node to a second target synchronization command node, which corresponds to the second target synchronization command.

10. The method according to claim 9 , further comprising accessing, within the fused linked list, the first target synchronization command node by traversing a path defined by pointers of nodes from the head node to the second target synchronization command node.

11. The method according to claim 10 , further comprising removing, from the fused linked list, a target write command node, which is located on the path defined by the pointers of nodes from the first target synchronization command node to the second target synchronization command node, after the synchronization operation for a write command corresponding to the target write command node is completed among the plurality of write commands.

12. The method according to claim 7 , further comprising removing, from the fused linked list, the first target synchronization command node when there is no write command node located on the path defined by the pointers of nodes from the head node to the first target synchronization command node.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 25, 2022
From: BYUN, EU JOON
To: SK HYNIX INC.
Reel/Frame 059703/0112 →
Priority Claims (1)
KR 10-2021-0132859 · Oct 7, 2021 · national
Continuity (1)
Related Publication 20230116156A1 · Apr 13, 2023