IP Library Patent Application 17744535
Patent Application
App. No. 17/744,535

EPITAXIAL STRUCTURE HAVING INTEGRATED MICROCHANNELS

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Quick Facts
Patent No.
US None
App. No.
17/744,535
Abstract

An apparatus includes an epitaxial structure comprising a bottom layer, channel walls formed on the bottom layer, and a top layer that encloses the channel walls and forms microchannels therebetween. The bottom layer, channel walls, and covering layer are a monolithic, crystalline formation. An electronic or optoelectronic device is monolithically formed on a first build surface of the bottom layer or the top layer. The electronic or optoelectronic device is energy-coupled to the microchannels through the bottom layer or the top layer.

Claims (31)

1 . An apparatus comprising:

an epitaxial structure comprising a bottom layer, channel walls formed on the bottom layer, and a top layer that encloses the channel walls and forms microchannels therebetween, the bottom layer, channel walls, and covering layer comprising a monolithic, crystalline formation; and

a first electronic or optoelectronic device monolithically formed on a first build surface of one of the bottom layer or the top layer, the first electronic or optoelectronic device being energy-coupled to the microchannels through the bottom layer or the top layer.

2 . The apparatus of claim 1 , wherein the energy coupling of the first electronic or optoelectronic device to the microchannels comprises heat transfer from the first electronic or optoelectronic device to a heat transfer fluid or gas in the microchannels.

3 . The apparatus of claim 2 , wherein the heat transfer fluid evaporates to a vapor in first part of the microchannels proximate the first electronic or optoelectronic device and condenses to a liquid in a second part of the microchannels away from the first electronic or optoelectronic device, wherein the liquid flows back to the first part of the microchannels via capillary forces.

4 . The apparatus of claim 2 , wherein the first electronic device comprises a high-electron-mobility transistor.

5 . The apparatus of claim 1 , further comprising a second electronic or optoelectronic device formed on a second build surface the epitaxial structure opposed to the first build surface, the second electronic or optoelectronic device being energy-coupled to the microchannels through the bottom layer or the top layer.

6 . The apparatus of claim 5 , wherein the first electronic or optoelectronic device comprises a light emitter optically coupled to the microchannels and the second electronic device comprises a light detector optically coupled to the microchannels, and wherein an analyte flows through the microchannels, and the light emitter and light detector are configured to perform a spectral analysis on the analyte.

7 . The apparatus of claim 1 , wherein the first electronic or optoelectronic device comprises an electromagnetic transmitter or receiver that is electromagnetically coupled to the microchannels, the microchannels configured as waveguides to propagate electromagnetic energy from or to the electromagnetic transmitter or receiver.

8 . The apparatus of claim 1 , wherein the epitaxial structure is formed from Al x Ga 1-x-y In y N.

9 . A method comprising:

depositing elongated strips or otherwise segmented pattern of a mask material onto a growth substrate or template;

epitaxially growing a crystalline semiconductor on the growth substrate or template around the mask material to form channel walls;

epitaxially growing the crystalline semiconductor on the channel walls to form a build surface that covers the elongated strips of the mask material;

removing the mask material to form elongated microchannels; and

forming a first electronic or optoelectronic device on the build surface.

10 . The method of claim 9 , wherein the mask material comprises a dielectric.

11 . The method of claim 9 , wherein the growth substrate or template comprises Al x Ga 1-x-y In y N, and wherein the crystalline semiconductor comprises Al x Ga 1-x-y In y N.

12 . The method of claim 9 , wherein the elongated strips or otherwise segmented sections of the mask material are patterned using lithography.

13 . The method of claim 9 , wherein the removing of the mask material is performed via wet etching.

14 . The method of claim 9 , wherein epitaxially growing the crystalline semiconductor on the growth substrate or template to form the channel walls and epitaxially growing the crystalline semiconductor to form the build surface comprises using metalorganic vapor phase epitaxy.

15 . A method comprising:

epitaxially growing elongated strips or otherwise segmented sections of a first crystalline semiconductor material onto a growth substrate or template formed of a second semiconductor material;

epitaxially growing the second crystalline semiconductor on the elongated strips or otherwise segmented sections and the growth substrate or template to form a build surface that covers the elongated strips;

removing the first crystalline semiconductor material to form elongated microchannels; and

forming a first electronic or optoelectronic device on the build surface.

16 . The method of claim 15 , wherein epitaxially growing the elongated strips or otherwise segmented sections of the first crystalline semiconductor material onto the growth substrate or template comprises lithographically forming a striped mask pattern on the growth substrate or template, the elongated strips formed in voids of the striped mask pattern.

17 . The method of claim 15 , wherein the first and second crystalline semiconductor materials comprise a common chemical composition with different dopant levels.

18 . The method of claim 17 , wherein the common chemical composition comprises Al x Ga 1-x-y In y N.

19 . The method of claim 15 , wherein the first and second crystalline semiconductor materials comprise a dissimilar chemical composition.

20 . The method of claim 15 , wherein the first crystalline semiconductor material comprises Al x1 Ga 1-x1-y1 In y1 N and the second crystalline semiconductor material comprises Al x2 Ga 1-x2-y2 In y2 N, where x 1 ≠x 2 or y 1 ≠y 2 .

Assignments (8)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 31, 2025
From: XEROX CORPORATION
To: GENESEE VALLEY INNOVATIONS, LLC
Reel/Frame 073225/0116 →
SECOND LIEN NOTES PATENT SECURITY AGREEMENT Recorded Jul 2, 2025
From: XEROX CORPORATION
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 071785/0550 →
FIRST LIEN NOTES PATENT SECURITY AGREEMENT Recorded Apr 11, 2025
From: XEROX CORPORATION
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 070824/0001 →
SECURITY INTEREST Recorded Feb 13, 2024
From: XEROX CORPORATION
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 066741/0001 →
SECURITY INTEREST Recorded Nov 20, 2023
From: XEROX CORPORATION
To: JEFFERIES FINANCE LLC, AS COLLATERAL AGENT
Reel/Frame 065628/0019 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVAL OF US PATENTS 9356603, 10026651, 10626048 AND INCLUSION OF US PATENT 7167871 PREVIOUSLY RECORDED ON REEL 064038 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jun 28, 2023
From: PALO ALTO RESEARCH CENTER INCORPORATED
To: XEROX CORPORATION
Reel/Frame 064161/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 20, 2023
From: PALO ALTO RESEARCH CENTER INCORPORATED
To: XEROX CORPORATION
Reel/Frame 064038/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 16, 2022
From: WUNDERER, THOMAS
To: PALO ALTO RESEARCH CENTER INCORPORATED
Reel/Frame 059918/0356 →