Display panel and display apparatus
A display panel includes: a transparent substrate with a display area including a light-emitting area and a non-light-emitting area; a light-emitting device on the transparent substrate, where the light-emitting device includes a first transparent electrode layer, a light-emitting functional layer and a second transparent electrode layer; the light-emitting functional layer includes light-emitting parts arranged in an array, and the light-emitting parts are in the corresponding light-emitting area; a driving structure between the transparent substrate and the light-emitting device, where the driving structure includes pixel circuits arranged in an array and a power supply line electrically connected to the pixel circuits to provide a power voltage, the pixel circuits are configured to drive the light-emitting parts to emit light; and orthographic projections of the pixel circuits and the power supply line on the transparent substrate are all located within an orthographic projection range of the non-light-emitting area on the transparent substrate.
1 . A double-sided display panel, comprising:
a transparent substrate with a display area comprising a-light-emitting areas and a non-light-emitting area around the light-emitting area;
a light-emitting device on the transparent substrate, wherein the light-emitting device comprises a first transparent electrode layer, a light-emitting functional layer and a second transparent electrode layer arranged in sequence; the light-emitting functional layer comprises a plurality of light-emitting parts arranged in an array, and the plurality of light-emitting parts are located in the light-emitting areas;
a driving structure between the transparent substrate and the light-emitting device, wherein the driving structure comprises a plurality of pixel circuits arranged in an array and a power supply line electrically connected to the pixel circuits to provide a power voltage, the pixel circuits are configured to drive the corresponding light-emitting parts to emit light; and orthographic projections of the pixel circuits and the power supply line on the transparent substrate are all located within an orthographic projection of the non-light-emitting area on the transparent substrate; wherein the driving structure further comprises: a gate line and a data line, the gate line and the data line intersect with each other to form a mesh structure, the mesh structure is provided with a plurality of mesh holes, and orthographic projections of the light-emitting areas on the transparent substrate are located in orthographic projections of the mesh holes on the transparent substrate; the power supply line and the data line are arranged crosswise, and the power supply line and the gate line are arranged in a same layer; and
a heat dissipation protective layer on a side of the transparent substrate facing away from the light-emitting device; wherein the heat dissipation protective layer is provided with opening areas corresponding to the light-emitting areas.
2 . The display panel of claim 1 , wherein:
the first transparent electrode layer is a fully-transparent or semi-transparent electrode layer; and
the second transparent electrode layer is a fully-transparent or semi-transparent electrode layer.
3 . The display panel of claim 2 , wherein:
material of the first transparent electrode layer comprises Indium Tin Oxide (ITO), Indium Zinc Oxide (IZO), Indium Gallium Oxide (IGO), Gallium Zinc Oxide (GZO), Zinc Oxide (ZnO), Indium Oxide (In2O3), Aluminum Zinc Oxide (AZO) or carbon nanotube; and
material of the second transparent electrode layer comprises Indium Tin Oxide (ITO), Indium Zinc Oxide (IZO), Indium Gallium Oxide (IGO), Gallium Zinc Oxide (GZO), Zinc Oxide (ZnO), Indium Oxide (In2O3), Aluminum Zinc Oxide (AZO) or carbon nanotube.
4 . The display panel of claim 1 , further comprising a pixel defining layer with pixel openings in a one-to-one correspondence to the light-emitting areas, wherein the orthographic projections of the pixel circuits and the power supply line on the transparent substrate are all located within an orthographic projection of the pixel defining layer on the transparent substrate.
5 . The display panel of claim 1 , wherein the first transparent electrode layer is between the driving structure and the light-emitting functional layer, the first transparent electrode layer is an anode layer, and the second transparent electrode layer is a cathode layer;
the light-emitting part comprises: a light-emitting layer, at least one of a hole injection layer and a hole transport layer between the first transparent electrode layer and the light-emitting layer, and at least one of a hole blocking layer, an electron transport layer and an electron injection layer between the light-emitting layer and the second transparent electrode layer.
6 . The display panel of claim 5 , wherein a transmittance of the first transparent electrode layer is 88%-94%, a transmittance of the second transparent electrode layer is 88%-94%, a transmittance of the electron injection layer is 80%-92%, a transmittance of the electron transport layer is 80%-92%, a transmittance of the hole blocking layer is 75%-90%, a transmittance of the hole transport layer is 75%-90%, and a transmittance of the hole injection layer is 75%-90%.
7 . The display panel of claim 1 , wherein the transparent substrate is a glass substrate or a plastic substrate.
8 . The display panel of claim 1 , further comprising a transparent encapsulation layer, located on a side of the light-emitting device away from the transparent substrate and covering the light-emitting device.
9 . A display apparatus, comprising the display panel according to claim 1 .
10 . The display apparatus of claim 9 , further comprising a transparent cover plate disposed opposite to the display panel, wherein the transparent cover plate covers the display panel.
11 . The display panel of claim 1 , wherein the pixel circuit comprises a switch transistor and a drive transistor, the gate line and the data line are both electrically connected to the corresponding switch transistor, and the power supply line is electrically connected to the drive transistor;
each of the switch transistor and the drive transistor comprises a gate layer and a source-drain layer, the gate line is located in the gate layer, and the data line is located in the source-drain layer.