Granted Patent B2

US 12,310,246 · App. 17/804,680 · Granted May 20, 2025

Inventors: Sundar Chetlur (Frisco, TX); Maxim Klebanov (Palm Coast, FL); Yen Ting Liu (Hsinchu, TW); Paolo Campiglio (Arcueil, FR)

Assignee: Allegro MicroSystems, LLC

H10N50/01G01R33/0052G01R33/093G01R33/098

Abstract

Claims (106)

1. A method, comprising: depositing a capping layer on a semiconductor device structure comprising: a plurality of tunneling magnetoresistance (TMR) elements; a corresponding one hard mask on each TMR element; a metal layer; and a plurality of electroconductive vias directly connecting the TMR elements to the metal layer; depositing an insulator on the capping layer; depositing a first photoresist on the insulator; patterning the first photoresist using photolithography to expose portions of the insulator; etching the exposed portions of the insulator and the hard masks to expose top surfaces of the TMR elements; stripping the first photoresist; and depositing a conducting material on the top surfaces of the TMR elements to form an electroconductive contact.

2. The method of claim 1 , further comprising:

depositing a second photoresist on the conducting material;

patterning the first photoresist using photolithography to expose portions of the conducting material;

etching the exposed portions of the conducting material and the insulator material;

stripping the second photoresist; and

depositing a first passivation layer directly on the conducting material and the insulator.

3. The method of claim 2 , further comprising:

performing planarization on the passivation layer;

depositing a third photoresist on the passivation layer;

patterning the third photoresist using photolithography to expose portions of the passivation layer;

etching the exposed portions of the passivation layer and the insulator material to the metal layer;

stripping the third photoresist;

depositing a metal in direct contact with the metal layer; and

depositing a second passivation layer.

4. The method of claim 2 , further comprising:

performing planarization on the first passivation layer;

depositing a third photoresist on the first passivation layer;

patterning the third photoresist using photolithography to expose portions of the first passivation layer;

etching the exposed portions of the first passivation layer to the conducting material;

stripping the third photoresist;

depositing a fourth photoresist on the first passivation layer;

patterning the fourth photoresist using photolithography to expose portions of the passivation layer;

etching the exposed portions of the passivation layer and the insulator material to the metal layer;

stripping the fourth photoresist;

depositing a metal in direct contact with the metal layer and in direct contact with the conducting material;

depositing a fifth photoresist on the metal;

patterning the fifth photoresist using photolithography to expose portions of the metal;

etching the exposed portions of the metal;

stripping the fifth photoresist; and

depositing a second passivation layer.

5. The method of claim 1 , wherein depositing the conducting material on the top surfaces of the TMR elements to form an electroconductive contact comprises depositing titanium nitride.

6. A method, comprising: depositing a capping layer over a semiconductor device structure comprising: a plurality of tunneling magnetoresistance (TMR) elements; a corresponding one hard mask on each TMR element; a metal layer; and a plurality of electroconductive vias directly connecting the TMR elements to the metal layer; depositing a first insulator on the capping layer; depositing a first photoresist on the insulator; patterning the first photoresist using photolithography to expose portions of the first insulator; etching the exposed portions of the first insulator and the hard masks to expose top surfaces of the TMR elements; stripping the first photoresist; and depositing a conducting material on the top surfaces of the TMR elements to form an electroconductive contact.

7. The method of claim 6 , further comprising:

depositing a second insulator on the conducting material;

etching the second insulator;

planarizing the conducting material and the second insulator; and

depositing a passivation layer on the planarized conducting material and the planarized second insulator.

8. The method of claim 7 , further comprising:

depositing a TMR layer;

depositing a hard mask layer;

depositing a second photoresist on the hard mask layer;

patterning the second photoresist using photolithography to expose portions of the hard mask layer;

etching the hard mask layer;

stripping the second photoresist;

etching the TMR layer to form a second plurality of TMR elements;

depositing a second capping layer on the second plurality of TMR elements;

depositing a third insulator on the second capping layer depositing a third photoresist on the third insulator;

patterning the third photoresist using photolithography to expose portions of the third insulator;

etching the third insulator to the second plurality of TMR elements;

stripping the third photoresist; and

depositing a second conducting material in contact with the second plurality of TMR elements.

9. The method of claim 8 , further comprising:

depositing a fourth photoresist on the second conducting material;

patterning the fourth photoresist using photolithography to expose portions of the second conducting material;

etching the second conducting material to the third insulator;

stripping the fourth photoresist;

depositing a fourth insulator direct contact with the second conducting material and in direct contact with the third insulator;

etching back the fourth insulator;

perform planarization on the second conducting material; and

depositing a second passivation layer on the second conducting material.

10. The method of claim 8 , wherein the second conducting material, the second plurality of TMR elements; and the metal form a first TMR structure,

further comprising forming addition TMR structures.

11. The method of claim 8 , wherein depositing the second conducting material in contact with the second plurality of TMR elements comprises depositing titanium nitride.

12. A method, comprising: depositing an insulator on a capping layer of a semiconductor device structure, the semiconductor structure comprising: a magnetoresistance (MR) element: a hard mask on the MR element; and the capping layer on the hard mask; depositing a first photoresist on the insulator; patterning the first photoresist using photolithography to expose portions of the insulator; etching the insulator; stripping the first photoresist; and depositing a metal on a top surface of the MR element to form an electroconductive contact, further comprising planarizing the insulator before depositing the first photoresist, wherein etching the insulator comprises etching the insulator and the hard mask exposing a top surface of the MR element and leaving a portion of the hard mask and the capping layer on each end of the MR element.

13. The method of claim 12 , wherein the MR element has a diameter less than a micron.

14. The method of claim 12 , wherein the MR element is a tunneling magnetoresistance element.

15. The method of claim 12 , wherein etching the insulator comprises etching the insulator and the hard mask exposing the top surface of the MR element.

16. The method of claim 12 , further comprising:

depositing a second photoresist on the insulator after stripping the first photoresist;

patterning the second photoresist using photolithography to expose portions of the capping layer;

etching the capping layer and the hard mask down to the MR element leaving a portion of the hard mask and the capping layer on each end of the MR element; and

stripping the second photoresist before depositing the metal on the top surface of the TMR element to form the electroconductive contact.

17. A method, comprising: depositing a capping layer on a semiconductor device structure comprising: a plurality of magnetoresistance (MR) elements; a corresponding one hard mask on each MR element; a metal layer; and a plurality of electroconductive vias directly connecting the MR elements to the metal layer; depositing an insulator on the capping layer; depositing a first photoresist on the insulator; patterning the first photoresist using photolithography to expose portions of the insulator; etching the exposed portions of the insulator and the hard masks to expose top surfaces of the MR elements; stripping the first photoresist; and depositing a conducting material on the top surfaces of the MR elements to form an electroconductive contact.

18. The method of claim 17 , further comprising:

depositing a second photoresist on the conducting material;

patterning the first photoresist using photolithography to expose portions of the conducting material;

etching the exposed portions of the conducting material and the insulator material;

stripping the second photoresist; and

depositing a first passivation layer directly on the conducting material and the insulator.

19. The method of claim 18 , further comprising:

performing planarization on the passivation layer;

depositing a third photoresist on the passivation layer;

patterning the third photoresist using photolithography to expose portions of the passivation layer;

etching the exposed portions of the passivation layer and the insulator material to the metal layer;

stripping the third photoresist;

depositing a metal in direct contact with the metal layer; and

depositing a second passivation layer,

wherein depositing the conducting material on the top surfaces of the MR elements to form an electroconductive contact comprises depositing titanium nitride.

20. The method of claim 18 , further comprising:

performing planarization on the first passivation layer;

depositing a third photoresist on the first passivation layer;

patterning the third photoresist using photolithography to expose portions of the first passivation layer;

etching the exposed portions of the first passivation layer to the conducting material;

stripping the third photoresist;

depositing a fourth photoresist on the first passivation layer;

patterning the fourth photoresist using photolithography to expose portions of the passivation layer;

etching the exposed portions of the passivation layer and the insulator material to the metal layer;

stripping the fourth photoresist;

depositing a metal in direct contact with the metal layer and in direct contact with the conducting material;

depositing a fifth photoresist on the metal;

patterning the fifth photoresist using photolithography to expose portions of the metal;

etching the exposed portions of the metal;

stripping the fifth photoresist; and

depositing a second passivation layer,

wherein depositing the conducting material on the top surfaces of the MR elements to form an electroconductive contact comprises depositing titanium nitride.

Assignments (2)

Continuity (1)

References Cited (80)