Apparatus and method for descriptor handling in software and hardware interworking systems and computer-readable medium
Apparatuses and methods for command and response descriptors handling are provided. In an example, a method for descriptor handling can include instantiating a command descriptor of a command regarding a packet at a first layer of a protocol stack by a microcontroller of a node. The method can also include passing a command pointer to the command descriptor to integrated circuits of the node from the microcontroller of the node. The method can further include looking up, by the integrated circuits, the command descriptor. The method can additionally include processing the command by the integrated circuits.
1. An apparatus for descriptor handling, comprising:
a microcontroller and integrated circuits;
wherein the microcontroller is configured to:
instantiate a command descriptor of a command regarding a packet at a first layer of a protocol stack, and
pass a command pointer of the command descriptor to the integrated circuits of the apparatus; and
wherein the integrated circuits are configured to:
look up the command descriptor;
process the command;
instantiate a response descriptor or update the command descriptor to serve as the response descriptor; and
pass a response pointer of the response descriptor to the microcontroller.
2. The apparatus of claim 1 , wherein the first layer comprises a medium access control (MAC) layer.
3. The apparatus of claim 1 , wherein the microcontroller is configured to receive an interrupt, wherein reception of the interrupt is a trigger for the microcontroller to issue the command.
4. The apparatus of claim 1 , wherein the microcontroller is further configured to:
receive the response pointer;
look up the response descriptor; and
process the response.
5. The apparatus of claim 1 , wherein the response descriptor comprises a universal packet descriptor.
6. The apparatus of claim 1 , wherein the response descriptor is configured to be usable by the first layer of the protocol stack and at least one further layer of the protocol stack.
7. The apparatus of claim 1 , wherein the response descriptor is configured to be usable by the first layer of the protocol stack and at least three further layers of the protocol stack.
8. The apparatus of claim 1 , wherein a lifespan of the updated command descriptor corresponds to passage of the packet through all layers of the protocol stack.
9. The apparatus of claim 1 , wherein the microcontroller is further configured to:
instantiate a new command descriptor or update the command descriptor regarding the packet at a second layer of the protocol stack; and
pass a command pointer of the new command descriptor, or the command pointer of the updated command descriptor, to the integrated circuits.
10. The apparatus of claim 1 , wherein the command descriptor comprises a universal packet descriptor.
11. The apparatus of claim 1 , wherein the command descriptor is configured to be usable by the first layer of the protocol stack and at least one further layer of the protocol stack.
12. The apparatus of claim 1 , wherein the command descriptor is configured to be usable by the first layer of the protocol stack and at least three further layers of the protocol stack.
13. A method for descriptor handling, comprising:
instantiating a command descriptor of a command regarding a packet at a first layer of a protocol stack by a microcontroller of a node;
passing a command pointer of the command descriptor to integrated circuits of the node from the microcontroller of the node;
looking up the command descriptor by the integrated circuits;
processing the command by the integrated circuits;
instantiating a response descriptor by the integrated circuits or updating the command descriptor to serve as the response descriptor by the integrated circuits; and
passing a response pointer of the response descriptor to the microcontroller by the integrated circuits.
14. The method of claim 8 , wherein the first layer comprises a medium access control (MAC) layer.
15. The method of claim 8 , further comprising:
receiving an interrupt at the microcontroller, wherein reception of the interrupt is a trigger for the microcontroller to issue the command.
16. A non-transitory computer-readable medium encoding instructions that, when executed by a node, perform a process for descriptor handling, the process comprising:
instantiating a command descriptor of a command regarding a packet at a first layer of a protocol stack by a microcontroller of the node;
passing a command pointer of the command descriptor to integrated circuits of the node from the microcontroller of the node;
looking up the command descriptor by the integrated circuits;
processing the command by the integrated circuits;
instantiating a response descriptor by the integrated circuits or updating the command descriptor to serve as the response descriptor by the integrated circuits; and
passing a response pointer of the response descriptor to the microcontroller by the integrated circuits.