IP Library Granted Patent US 12,229,062
Granted Patent B2
US 12,229,062 · App. 17/823,432 · Granted Feb 18, 2025

Erroneous select die access (SDA) detection

Inventors: Yang Lu (Boise, ID); Creston M. Dupree (Boise, ID); Kang-Yong Kim (Boise, ID)
Assignee: Micron Technology, Inc.
G06F13/1689G06F11/0772G06F13/1663
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Quick Facts
Patent No.
US 12,229,062
App. No.
17/823,432
Granted
Feb 18, 2025
Kind
B2
Abstract

Described apparatuses and methods relate to erroneous select die access (SDA) detection for a memory system. A memory system may include a memory controller and a memory device that are capable of implementing an SDA protocol that enables selective memory die access to multiple memory devices that couple to a command bus. A memory device can include logic that determines if signaling that conflicts with the SDA protocol is detected. If it is determined that conflicting signaling is detected, the logic may provide an indication of the conflicted signaling. In doing so, the erroneous SDA detection described herein may reduce the likelihood of a memory device erroneously masking memory dice, thereby limiting the memory device from exhibiting unexpected, and in some cases, dangerous behavior.

Claims (116)

1. An apparatus comprising:

multiple memory dice;

a command bus coupled to the multiple memory dice and configured to be shared by the multiple memory dice; and

logic coupled to the command bus and configured to:

detect signaling that conflicts with a protocol enabling selective masking of a die of the multiple memory dice, the masking effective to prevent the die from implementing a command received via the command bus; and

provide an indication of the detection of the signaling that conflicts with the protocol enabling selective masking of the die.

2. The apparatus of claim 1 , wherein:

the apparatus further comprises a first register; and

the logic is configured to, in response to the detection of the signaling that conflicts with the protocol enabling selective masking of the die, write a first value in the first register.

3. The apparatus of claim 2 , wherein the logic is further configured to:

determine that a first command to enable the protocol enabling selective masking of the die has or has not been received; and

determine that a second command to mask the die of the multiple memory dice has or has not been received.

4. The apparatus of claim 3 , wherein the logic is further configured to:

determine that the first command has been received;

determine that the second command has not been received;

determine that a predetermined period of time has elapsed since the first command has been received; and

write the first value in the first register in response to the determination that the predetermined period of time has elapsed without reception of the second command.

5. The apparatus of claim 4 , wherein the predetermined period of time is between approximately 100 microseconds and 10 milliseconds.

6. The apparatus of claim 4 , wherein the logic is further configured to:

store multiple periods of time for the predetermined period of time; and

receive signaling indicative of a third command to select the predetermined period of time from the multiple periods of time that are stored.

7. The apparatus of claim 6 , wherein at least one of the multiple periods of time for the predetermined period of time that are stored is approximately 100 microseconds, 500 microseconds, 2 milliseconds, or 10 milliseconds.

8. The apparatus of claim 4 , wherein:

the apparatus further comprises a second register; and

the logic is further configured to write a second value to the second register indicative of the predetermined period of time.

9. The apparatus of claim 3 , wherein the logic is further configured to:

determine that the second command has been received;

determine that the first command has not been received; and

write the first value in the first register in response to the determination that the second command has been received and the determination that the first command has not been received.

10. The apparatus of claim 2 , wherein the logic is further configured to disable the protocol enabling selective masking of the die responsive to the detection of the signaling that conflicts with the protocol enabling selective masking of the die.

11. The apparatus of claim 10 , wherein:

the apparatus further comprises a second register and a third register; and

the logic is further configured to:

read a second value from the second register, the second value indicative that the logic is configured to disable the protocol enabling selective masking of the die; and

write, based on the second value, a third value to the third register effective to disable the protocol enabling selective masking of the die in response to the detection of the signaling that conflicts with the protocol enabling selective masking of the die.

12. The apparatus of claim 2 , wherein the logic is further configured to write, after writing the first value in the first register, a second value in the first register, the second value being different from the first value, in response to at least one of:

a reception of a first command to enter a select die access mode in accordance with the protocol enabling selective masking of the die;

a power cycle of the multiple memory dice;

a reset of the multiple memory dice; or

a reception of a second command to disable the logic from detecting the signaling that conflicts with the protocol enabling selective masking of the die.

13. The apparatus of claim 1 , wherein:

the apparatus further comprises a first register; and

the logic is further configured to:

write a first value to the first register effective to enable the logic to detect the signaling that conflicts with the protocol enabling selective masking of the die; and

write a second value to the first register effective to disable the logic from detecting the signaling that conflicts with the protocol enabling selective masking of the die.

14. The apparatus of claim 1 , wherein the protocol enabling selective masking of the die comprises a select die access protocol.

15. The apparatus of claim 1 , wherein:

the multiple memory dice comprise at least a portion of the logic.

16. The apparatus of claim 1 , wherein the protocol enabling selective masking of the die further relates to selecting for access another die of the multiple memory dice, the selected other die configured to implement the command received via the command bus.

17. The apparatus of claim 1 , wherein the command bus comprises a command and address bus.

18. The apparatus of claim 1 , wherein:

the apparatus comprises a Compute Express Link® (CXL®) device; and

the logic is coupled to the multiple memory dice via an interconnect that is internal to the CXL® device.

19. The apparatus of claim 1 , wherein the apparatus is configured to be coupled to an interconnect that comports with at least one Compute Express Link® (CXL®) standard.

20. A method comprising:

receiving a first command to enable a protocol enabling selective masking of a die of multiple memory dice coupled to a command bus, the masking effective to prevent the die from implementing a command received via the command bus;

detecting, based on the first command, signaling that conflicts with the protocol enabling selective masking of the die; and

providing an indication of the detected signaling that conflicts with the protocol enabling selective masking of the die in response to the detecting.

21. The method of claim 20 , further comprising:

after receiving the first command, determining that a second command effective to disable the protocol enabling selective masking of the die has not been received;

determining that a predetermined period of time has elapsed after receiving the first command; and

detecting signaling that conflicts with the protocol enabling selective masking of the die in response to determining that the predetermined period of time has elapsed without receiving the second command.

22. The method of claim 20 , further comprising:

determining that a feature related to disabling the protocol enabling selective masking of the die is enabled; and

disabling the protocol enabling selective masking of the die in response to detecting signaling that conflicts with the protocol enabling selective masking of the die and determining that the feature related to disabling the protocol enabling selective masking of the die is enabled.

23. The method of claim 20 , further comprising:

prior to detecting signaling that conflicts with the protocol enabling selective masking of the die, determining that a feature related to detecting signaling that conflicts with the protocol enabling selective masking of the die is enabled,

wherein detecting signaling that conflicts with the protocol enabling selective masking of the die is performed responsive to determining that the feature related to detecting signaling that conflicts with the protocol enabling selective masking of the die is enabled.

24. The method of claim 20 , further comprising:

after providing the indication of the detection of the signaling that conflicts with the protocol enabling selective masking of the die, performing an action comprising at least one of: a reset of a memory device that includes the multiple memory dice, a power cycle of the memory device, a reception of the first command, or a reception of a second command to disable a feature related to detecting signaling that conflicts with the protocol enabling selective masking of the die; and

providing an indication that signaling that conflicts with the protocol enabling selective masking of the die has not been detected in response to performing the action.

25. A method comprising:

before receiving a first command to enable a protocol enabling selective masking of a die of multiple memory dice coupled to a command bus, the masking effective to prevent the die from implementing a command received via the command bus, receiving a second command to mask the die of the multiple memory dice;

detecting, based on the receiving of the second command, signaling that conflicts with the protocol enabling selective masking of the die; and

providing an indication of the detected signaling that conflicts with the protocol enabling selective masking of the die responsive to the detecting.

26. The method of claim 25 , further comprising:

determining that the protocol enabling selective masking of the die has been enabled in response to detecting signaling that conflicts with the protocol enabling selective masking of the die; and

disabling the protocol enabling selective masking of the die in response to determining that the protocol enabling selective masking of the die has been enabled.

27. The method of claim 26 , further comprising:

determining that a feature related to disabling the protocol enabling selective masking of the die is enabled in response to determining that the protocol enabling selective masking of the die has been enabled, wherein disabling the protocol enabling selective masking of the die is responsive to determining that the feature related to disabling the protocol enabling selective masking of the die is enabled.

28. The method of claim 25 , further comprising:

prior to detecting signaling that conflicts with the protocol enabling selective masking of the die, determining that a feature related to enabling the detection of signaling that conflicts with the protocol enabling selective masking of the die is enabled,

wherein detecting signaling that conflicts with the protocol enabling selective masking of the die is responsive to determining that the feature related to enabling the detection of signaling that conflicts with the protocol enabling selective masking of the die is enabled.

29. A method comprising:

transmitting signaling indicative of a first command, the first command effective to enable a feature related to detecting signaling that conflicts with a protocol enabling selective masking of a die of multiple memory dice coupled to a command bus, the masking effective to prevent the die from implementing a command received via the command bus;

transmitting signaling indicative of a request to read a value from a first register, the value indicative of detected signaling that conflicts with the protocol enabling selective masking of the die;

receiving signaling indicative of the value from the first register; and

performing an error handling process in response to receiving the signaling indicative of the value.

30. The method of claim 29 , further comprising:

transmitting signaling indicative of a predetermined period of time, the signaling effective to configure the feature related to detecting signaling that conflicts with the protocol enabling selective masking of the die by defining a maximum allowable time between a reception of a second command to enable the protocol enabling selective masking of the die and a reception of a third command to mask the die of the multiple memory dice.

31. The method of claim 29 , further comprising:

transmitting signaling indicative of a second command to enable a feature related to disabling the protocol enabling selective masking of the die responsive to detection of signaling that conflicts with the protocol enabling selective masking of the die.

32. The method of claim 29 , further comprising:

transmitting the signaling indicative of the request to read the value from the first register at least once every passage of a predetermined period of time.

33. The method of claim 29 , further comprising, responsive to performing an error handling process, at least one of:

transmitting signaling indicative of a second command to power cycle the multiple memory dice; or

transmitting signaling indicative of a third command to reset the multiple memory dice.

34. An apparatus comprising:

logic configured to:

transmit signaling indicative of a first command, the first command effective to enable a feature related to detecting signaling that conflicts with a protocol enabling selective masking of a die of multiple memory dice coupled to a command bus, the masking effective to prevent the die from implementing a command received via the command bus;

transmit signaling indicative of a request to read a value from a first register in response to transmitting the signaling indicative of the first command, the value indicative of detected signaling that conflicts with the protocol enabling selective masking of the die;

receive signaling indicative of the value from the first register; and

perform an error handling process in response to receiving the signaling indicative of the value.

35. The apparatus of claim 34 , wherein the logic is further configured to:

transmit signaling indicative of a predetermined period of time, the signaling effective to configure the feature related to detecting signaling that conflicts with the protocol enabling selective masking of the die by defining a maximum allowable time between a reception of a second command to enable the protocol enabling selective masking of the die and a reception of a third command to mask the die of the multiple memory dice.

36. The apparatus of claim 34 , wherein the logic is further configured to:

transmit signaling indicative of a second command to enable a feature related to disabling the protocol enabling selective masking of the die in response to detection of signaling that conflicts with the protocol enabling selective masking of the die.

37. The apparatus of claim 34 , wherein the logic is further configured to:

transmit the signaling indicative of the request to read the value from the first register at least once every passage of a predetermined period of time.

38. The apparatus of claim 34 , wherein the logic, responsive to performing an error handling process, is further configured to perform at least one of:

transmission of signaling indicative of a second command to power cycle the multiple memory dice; or

transmission of signaling indicative of a third command to reset a memory device that comprises the multiple memory dice.

39. The apparatus of claim 34 , wherein:

the apparatus comprises a Compute Express Link® (CXL®) device; and

the logic is coupled to a memory device comprising the multiple memory dice via an interconnect that is internal to the CXL® device.

40. The apparatus of claim 34 , wherein the apparatus is configured to be coupled to an interconnect that comports with at least one Compute Express Link® (CXL®) standard.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 31, 2022
From: LU, YANG; DUPREE, CRESTON M.; KIM, KANG-YONG
To: MICRON TECHNOLOGY, INC.
Reel/Frame 060959/0899 →
Continuity (1)
Related Publication 20240070096A1 · Feb 29, 2024
References Cited (2)
US 10162406B1 · Mazumder · 2018 [cited by examiner]
US 20130077429A1 · Kondo · 2013 [cited by examiner]