IP Library Granted Patent US 12,373,237
Granted Patent B2
US 12,373,237 · App. 17/826,911 · Granted Jul 29, 2025

Logical memory addressing by smart NIC across multiple devices

Inventors: Alex Markuze (Rosh HaAyin, IL); Shay Vargaftik (Herzliya, IL); Igor Golikov (Kfar Saba, IL); Yaniv Ben-Itzhak (Afek, IL); Avishay Yanai (Petach-Tikva, IL)
Assignee: VMware LLC
G06F9/45558G06F2009/4557G06F2009/45583G06F2009/45595
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Quick Facts
Patent No.
US 12,373,237
App. No.
17/826,911
Granted
Jul 29, 2025
Kind
B2
Abstract

Some embodiments provide a method for sending data messages at a network interface controller (NIC) of a computer. From a network stack executing on the computer, the method receives (i) a header for a data message to send and (ii) a logical memory address of a payload for the data message. The method translates the logical memory address into a memory address for accessing a particular one of multiple devices connected to the computer. The method reads payload data from the memory address of the particular device. The method sends the data message with the header received from the network stack and the payload data read from the particular device.

Claims (49)

1. A method for sending data messages, the method comprising:

at a network interface controller (NIC) of a computer:

from a network stack executing on the computer, receiving (i) a header for a data message to send and (ii) a logical memory address of a payload for the data message;

identifying a particular one of a plurality of devices connected to the NIC by decoding a first set of N bits of the logical memory address, wherein the first set of N bits is associated with a device-specific translation table stored in the NIC;

translating the logical memory address into a memory address for accessing the particular one of a plurality of devices connected to the computer;

reading payload data from the memory address of the particular device; and

sending the data message with the header received from the network stack and the payload data read from the particular device.

2. The method of claim 1 , wherein the plurality of devices comprises at least a virtual memory of the computer and a physical memory of the NIC.

3. The method of claim 2 , wherein the plurality of devices further comprises at least one non-volatile memory express (NVMe) device of the computer.

4. The method of claim 2 , wherein the plurality of devices further comprises a memory associated with a graphics processing unit (GPU) of the computer.

5. The method of claim 1 , wherein the data message is a first data message and the header is a first header, the method further comprising, prior to receiving the header and logical memory address from the network stack:

receiving a second data message from a network to which the NIC connects, the second data message comprising a second header and the same payload as the first data message;

storing the payload in a physical memory location of the NIC, the physical memory location having the logical memory address; and

providing the second header and the logical memory address at which the payload is stored to the network stack of the computer.

6. The method of claim 5 , wherein the computer performs a set of operations on the second header to derive the first header, the set of operations not requiring the payload of the second data message.

7. The method of claim 6 , wherein the set of operations comprises at least one of a set of firewall operations, a set of load balancing operations, and a set of network address translation operations.

8. The method of claim 1 , wherein the data message is a first data message, wherein the method further comprises, prior to receiving the header and logical memory address from the network stack:

receiving a second data message requesting a set of data stored at the computer, the requested set of data comprising the payload data; and

providing the second data message to the network stack of the computer.

9. The method of claim 8 , wherein the logical memory address is a first logical memory address and the memory address for accessing the particular device is a first memory address, the method further comprising:

from the network stack, receiving (i) a header for a third data message to send and (ii) a second logical memory address of a payload for the third data message;

translating the second logical memory address into a second memory address for accessing the particular device;

reading payload data for the third data message from the second memory address of the particular device; and

sending the second data message with the header received from the network stack and the payload data read from the particular device.

10. The method of claim 9 , wherein the headers for the first and third data messages are the same.

11. The method of claim 9 , wherein the first and second memory addresses refer to portions of a same file requested by the second data message.

12. A non-transitory machine-readable medium storing a program for execution by at least one processing unit of a network interface controller (NIC) of a computer, the program for sending data messages, the program comprising sets of instructions for:

from a network stack executing on the computer, receiving (i) a header for a data message to send and (ii) a logical memory address of a payload for the data message;

identifying a particular one of a plurality of devices connected to the NIC by decoding a first set of N bits of the logical memory address, wherein the first set of N bits is associated with a device-specific translation table stored in the NIC;

translating the logical memory address into a memory address for accessing the particular one of a plurality of devices connected to the computer;

reading payload data from the memory address of the particular device; and

sending the data message with the header received from the network stack and the payload data read from the particular device.

13. The non-transitory machine-readable medium of claim 12 , wherein the plurality of devices comprises at least a virtual memory of the computer and a physical memory of the NIC.

14. The non-transitory machine-readable medium of claim 13 , wherein the plurality of devices further comprises at least one non-volatile memory express (NVMe) device of the computer.

15. The non-transitory machine-readable medium of claim 12 , wherein the data message is a first data message and the header is a first header, the program further comprising sets of instructions for, prior to receiving the header and logical memory address from the network stack:

receiving a second data message from a network to which the NIC connects, the second data message comprising a second header and the same payload as the first data message;

storing the payload in a physical memory location of the NIC, the physical memory location having the logical memory address; and

providing the second header and the logical memory address at which the payload is stored to the network stack of the computer.

16. The non-transitory machine-readable medium of claim 15 , wherein the computer performs a set of operations on the second header to derive the first header, the set of operations not requiring the payload of the second data message.

17. The non-transitory machine-readable medium of claim 12 , wherein the data message is a first data message, wherein the program further comprises sets of instructions for, prior to receiving the header and logical memory address from the network stack:

receiving a second data message requesting a set of data stored at the computer, the requested set of data comprising the payload data; and

providing the second data message to the network stack of the computer.

18. The non-transitory machine-readable medium of claim 17 , wherein the logical memory address is a first logical memory address and the memory address for accessing the particular device is a first memory address, the program further comprising sets of instructions for:

from the network stack, receiving (i) a header for a third data message to send and (ii) a second logical memory address of a payload for the third data message;

translating the second logical memory address into a second memory address for accessing the particular device;

reading payload data for the third data message from the second memory address of the particular device; and

sending the second data message with the header received from the network stack and the payload data read from the particular device.

19. The non-transitory machine-readable medium of claim 18 , wherein the headers for the first and third data messages are the same.

20. The non-transitory machine-readable medium of claim 18 , wherein the first and second memory addresses refer to portions of a same file requested by the second data message.

Assignments (2)
CHANGE OF NAME Recorded Feb 27, 2024
From: VMWARE, INC.
To: VMWARE LLC
Reel/Frame 066692/0103 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2022
From: MARKUZE, ALEX; VARGAFTIK, SHAY; GOLIKOV, IGOR; BEN-ITZHAK, YANIV; YANAI, AVISHAY
To: VMWARE, INC.
Reel/Frame 060041/0023 →