Superconducting field-programmable gate array
A programmable circuit includes a superconducting component arranged in a multi-dimensional array of alternating narrow and wide portions. The programmable circuit further includes a plurality of heat sources, each heat source configured to selectively provide heat to a respective narrow portion sufficient to transition the respective narrow portion from a superconducting state to a non-superconducting state. The programmable circuit further includes a plurality of electrical terminals, each electrical terminal coupled to a respective wide portion of the multi-dimensional array.
1. A method comprising:
providing current to a superconducting multidimensional array in a first configuration, the superconducting multidimensional array comprising alternating narrow portions and wide portions, the current provided, in the first configuration, to a first superconducting set of the narrow portions such that the first superconducting set of narrow portions remain in a superconducting state while a first non-superconducting set of the narrow portions remain in a non-superconducting state, one or more of the wide portions being connected to electrical terminals that are connected to a programmable circuit;
outputting, from the superconducting multidimensional array in the first configuration, a first electrical output to the programmable circuit, the first electrical output being provided through the electrical terminals that are connected to the one or more of the wide portions;
providing additional current to the superconducting multidimensional array in a second configuration, the additional current provided, in the second configuration, to a second superconducting set of the narrow portions such that the second superconducting set of the narrow portions remain in the superconducting state while a second non-superconducting set of the narrow portions remain in the non-superconducting state; and
outputting, from the superconducting multidimensional array in the second configuration, a second electrical output to the programmable circuit, the second electrical output being provided through the electrical terminals that are connected to the one or more the wide portions.
2. The method of claim 1 , wherein a narrow portion of the superconducting multidimensional array is included in the first superconducting set of the narrow portions in the first configuration.
3. The method of claim 2 , wherein the narrow portion of the superconducting multidimensional array is included in the second superconducting set of narrow portions in the second configuration.
4. The method of claim 1 , wherein in the first configuration, the superconducting multidimensional array is configured to perform a logical operation.
5. The method of claim 4 , wherein in the second configuration, the superconducting multidimensional array is configured to perform an additional logical operation that is different from the logical operation of the first configuration.
6. The method of claim 4 , wherein the logical operation comprises one or more of: a logical AND operation; a logical OR operation; a majority gate operation; and an input counting operation.
7. The method of claim 1 , wherein the superconducting multidimensional array is arranged in a two-dimensional array.
8. The method of claim 1 , wherein the superconducting multidimensional array is patterned from a single thin film of superconducting material.
9. The method of claim 1 , wherein the narrow portions of the superconducting multidimensional array have substantially a same shape.
10. The method of claim 1 , wherein the current and the additional current are provided from a current source in the programmable circuit.
11. A superconducting multidimensional array comprising:
a plurality of narrow portions of superconducting material that forms the superconducting multidimensional array; and
a plurality of wide portions of the superconducting material that forms the superconducting multidimensional array, the plurality of narrow portions and the plurality of wide portions arranged in the superconducting multidimensional array such that the superconducting multidimensional array comprises alternating narrow portions and wide portions, one or more of the plurality of wide portions being connected to electrical terminals that are connected to a programmable circuit,
in a first configuration, current being provided to a first superconducting set of narrow portions such that the first superconducting set of narrow portions remaining in a superconducting state while a first non-superconducting set of the narrow portions remain in a non-superconducting state, and a first electrical output is output from the one or more of the plurality of wide portions to a programmable circuit using the electrical terminals that are connected to the one or more of the plurality of wide portions, and
in a second configuration, additional current being provided to a second superconducting set of narrow portions such that the second superconducting set of narrow portions remaining in a superconducting state while a second non-superconducting set of the narrow portions remain in a non-superconducting state, and, in the second configuration, a second electrical output is output from the one or more of the plurality of wide portions to a programmable circuit using the electrical terminals that are connected to the one or more of the plurality of wide portions.
12. The superconducting multidimensional array of claim 11 , wherein a narrow portion of the superconducting multidimensional array is included in the first superconducting set of the narrow portions in the first configuration.
13. The superconducting multidimensional array of claim 12 , wherein the narrow portion of the superconducting multidimensional array is included in the second superconducting set of narrow portions in the second configuration.
14. The superconducting multidimensional array of claim 12 , wherein in the first configuration, the superconducting multidimensional array is configured to perform a logical operation.
15. The superconducting multidimensional array of claim 14 , wherein in the second configuration, the superconducting multidimensional array is configured to perform an additional logical operation that is different from the logical operation of the first configuration.
16. The superconducting multidimensional array of claim 14 , wherein the logical operation comprises one or more of: a logical AND operation; a logical OR operation; a majority gate operation; and an input counting operation.
17. The superconducting multidimensional array of claim 11 , wherein the superconducting multidimensional array is arranged in a two-dimensional array.
18. The superconducting multidimensional array of claim 11 , wherein the superconducting multidimensional array is patterned from a single thin film of superconducting material.
19. The superconducting multidimensional array of claim 11 , wherein the narrow portions of the superconducting multidimensional array have substantially a same shape.
20. The superconducting multidimensional array of claim 11 , wherein the current and the additional current are provided from a current source in the programmable circuit.