IP Library Granted Patent US 12,407,445
Granted Patent B2
US 12,407,445 · App. 17/843,712 · Granted Sep 2, 2025

Systems and methods for improving communication throughput

Inventors: Victor Liau (Germantown, MD); Glenn Robins (Germantown, MD); Mustafa Eroz (Germantown, MD); Lin-nan Lee (Germantown, MD)
H04L1/0071H04L1/0057H04W24/02
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Quick Facts
Patent No.
US 12,407,445
App. No.
17/843,712
Granted
Sep 2, 2025
Kind
B2
Abstract

Communication terminals, systems and methods are disclosed herein. In an embodiment, a method for improving communication throughput when experiencing periodic blockages includes generating at least one outer code block including a plurality of sync data elements, writing the sync data elements from the at least one outer code block to a same column of at least one interleaver including a plurality of rows and a plurality of columns, and writing additional data elements from the outer code block to other columns of the at least one interleaver.

Claims (53)

1. A method for improving communication throughput when experiencing periodic blockages, the method comprising:

generating a first outer code block comprising a plurality of first sync data elements and a second outer code block comprising a plurality of second sync data elements;

writing multiple of the first sync data elements from the first outer code block and at least one second sync data element from the second outer code block to a first column of a first interleaver comprising a plurality of rows and a plurality of columns;

writing remaining second sync data elements from the second outer code block to a first column of a second interleaver comprising a plurality of rows and a plurality of columns; and

writing additional data elements from the first outer code block and the second outer code block to other columns of the first interleaver or the second interleaver.

2. The method of claim 1 , wherein

the first interleaver and the second interleaver are bit interleavers,

the sync data elements comprise sync bits, and

the additional data elements comprise additional bits.

3. The method of claim 1 , wherein

the first interleaver and the second interleaver are byte interleavers,

the sync data elements comprise sync bytes, and

the additional data elements comprise additional bytes.

4. The method of claim 1 , further comprising

accessing a sync table to determine when the second outer code block begins.

5. The method of claim 1 , wherein

the first outer code block is a different size than the first interleaver.

6. A communication terminal or gateway comprising a controller and a memory, the controller programmed to perform the method of claim 1 by executing instructions stored on the memory.

7. The method of claim 1 , comprising

using the sync data elements to identify each location where a beginning of an outer code block corresponds to a beginning of an interleaver.

8. The method of claim 1 , comprising

accessing a sync table identifying, for each of the first interleaver and the second interleaver, a first location where a sync row begins, a second location where an outer code row begins, and a third location where an outer code column begins.

9. A method for improving communication throughput when experiencing periodic blockages, the method comprising:

generating a plurality of outer code blocks each comprising at least one sync data element;

writing the sync data elements from the plurality of outer code blocks to same columns of a plurality of interleavers each comprising a plurality of rows and a plurality of columns; and

distinguishing between different interleavers of the plurality of interleavers using a longer series of asserted sync data elements down the same columns of one interleaver compared to another interleaver.

10. The method of claim 9 , wherein

the plurality of interleavers comprise a plurality of bit interleavers, and

the sync data elements comprise sync bits.

11. The method of claim 9 , wherein

the plurality of interleavers comprise a plurality of byte interleavers, and

the sync data elements comprise sync bytes.

12. The method of claim 9 , wherein

the same columns of the plurality of interleavers are the first columns of the plurality of interleavers, and

the writing writes additional data elements from the plurality of outer code blocks beginning at second columns of the plurality of interleavers.

13. The method of claim 9 , wherein

the distinguishing between different interleavers of the plurality of interleavers further includes using a sync byte with multiple labels to identify the plurality of interleavers.

14. The method of claim 9 , wherein

the outer code blocks are sized differently than the interleavers.

15. A method for improving communication throughput when experiencing periodic blockages, the method comprising:

generating a plurality of outer code blocks each comprising a plurality of sync bytes and a plurality of additional bytes;

writing the plurality of sync bytes and the plurality of additional bytes from the plurality of outer code blocks into a plurality of interleavers each comprising a plurality of rows and a plurality of columns, such that the sync bytes are written down first columns of the plurality of interleavers and the plurality of additional bytes are written down other columns of the plurality of interleavers; and

using sync bytes with multiple labels to identify each location where a beginning of an outer code block of the plurality of outer code blocks corresponds to a beginning of an interleaver of the plurality of interleavers.

16. The method of claim 15 , comprising

identifying where in a synchronization cycle a particular sync byte is located using a sync table.

17. The method of claim 15 , comprising

identifying at least one of the plurality of interleavers using more than one sync byte.

18. The method of claim 15 , comprising

writing the bytes from the outer code block column-wise into the plurality of interleavers.

19. The method of claim 15 , comprising

reading the bytes from the plurality of interleavers row-wise to an inner encoder.

20. The method of claim 15 , comprising

asserting a number of multiple sync bytes within the interleavers, the number being a reciprocal of an erasure rate plus one.

Assignments (2)
SECURITY INTEREST Recorded Jul 14, 2022
From: HUGHES NETWORK SYSTEMS, LLC
To: U.S. BANK NATIONAL ASSOCIATION
Reel/Frame 060506/0881 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 17, 2022
From: LIAU, VICTOR; ROBINS, GLENN; EROZ, MUSTAFA; LEE, LIN-NAN
To: HUGHES NETWORK SYSTEMS, LLC
Reel/Frame 060241/0808 →
Continuity (2)
Provisional Application 63301762 · Jan 21, 2022
Related Publication 20230239075A1 · Jul 27, 2023
References Cited (12)
US 4206440A · Doi et al. · 1980 [cited by applicant]
US 6791955B1 · Kikuchi et al. · 2004 [cited by applicant]
US 7305606B2 · Hoshizawa · 2007 [cited by examiner]
US 8045863B2 · Meagher et al. · 2011 [cited by applicant]
US 20020031146A1 · Abbas · 2002 [cited by examiner]
US 20070220408A1 · Huggett · 2007 [cited by examiner]
US 20090028247A1 · Suh et al. · 2009 [cited by applicant]
US 20150222294A1 · Eroz · 2015 [cited by examiner]
N. S. Muhammad, “Short Inner Block Codes for Serial Concatenated Codes and Bit-Interleaved Coded Modulation,” 2009 IEEE 70th Vehicular Technology Conference Fall, Anchorage, AK, USA, 2009, pp. 1-5. (Year: 2009). [cited by examiner]
A. Nilsson and T. M. Aulin, “Bit Interleaved Coded Modulation with Multi-Labeled Signal Mapping,” 2007 IEEE International Symposium on Information Theory, Nice, France, 2007, pp. 2141-2145. (Year: 2007). [cited by examiner]
Y. Q. Shi, Xi Min Zhang, Zhi-Cheng Ni and N. Ansari, “Interleaving for combating bursts of errors,” in IEEE Circuits and Systems Magazine, vol. 4, No. 1, pp. 29-42, 2004. (Year: 2004). [cited by examiner]
International Search Report and Written Opinion issued Jun. 7, 2023 in corresponding International Application No. PCT/US2023/011274. [cited by applicant]