IP Library Granted Patent US 12,149,684
Granted Patent B2
US 12,149,684 · App. 17/856,428 · Granted Nov 19, 2024

Encoder, a decoder and corresponding methods for intra prediction

Inventors: Biao Wang (Munich, DE); Semih Esenlik (Munich, DE); Anand Meher Kotra (Munich, DE); Han Gao (Munich, DE); Jianle Chen (San Diego, CA)
Assignee: HUAWEI TECHNOLOGIES CO., LTD.
H04N19/11H04N19/105H04N19/13H04N19/159H04N19/167H04N19/176H04N19/186H04N19/46H04N19/593
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Quick Facts
Patent No.
US 12,149,684
App. No.
17/856,428
Filed
Jul 1, 2022
Granted
Nov 19, 2024
Kind
B2
Art Unit
2487
USPC
375/240.02
Abstract

Devices and methods for Intra prediction are provided. The method includes: obtaining a value of an indication information of a current block. When the value of the indication information indicates the intra prediction mode of the current block is not comprised in the set of most probable modes, deriving the intra prediction mode IntraPredModeY of the current block by the following ordered steps: i. IntraPredModeY is set equal to intra_luma_mpm_remainder[xCb][yCb], ii. The value of IntraPredModeY is incremented by one. The method can improve the efficiency to determine the intra prediction mode of the current block.

Claims (42)

1. A device, comprising:

a receiver, configured to receive a bitstream; and

at least one storage medium configured to store the bitstream;

wherein the bitstream comprises:

indication information of a current block, a value of the indication information indicating whether an intra prediction mode of the current block is included in a set of most probable modes; and

a syntax element representing a remainder intra prediction mode when the value of the indication information indicates the intra prediction mode of the current block is not included in the set of most probable modes;

wherein the intra prediction mode of the current block is derived by:

setting the intra prediction mode equal to the syntax element, and incrementing a value of the intra prediction mode by one; and

for each candidate intra prediction mode candModeList[i] in an array of candidate intra prediction modes, when the intra prediction mode is greater than candModeList[i], incrementing a value of the intra prediction mode by one, wherein candModeList[i] represents a candidate intra prediction mode in the set of most probable modes, and wherein i ranges from N to M, inclusive, N and M are natural number, N>M.

2. The device of claim 1 , wherein

a candidate intra prediction mode candModeList[i] in the set of most probable modes is derived by sorting a plurality of candidate intra prediction modes,

for each candModeList[i], candModeList[i]<candModeList[i+1], wherein i ranges from 0 to 3.

3. The device of claim 2 , wherein the candidate intra prediction mode candModeList[i] is derived by:

when candModeList[i] is greater than candModeList[i+1], swapping values of candModeList[i] and candModeList[i+1].

4. The device of claim 1 , wherein the value of the indication information is indicated by a flag, and wherein when the value of the flag is not equal to 1, the intra prediction mode of the current block is not in the set of most probable modes.

5. The device of claim 1 , wherein the syntax element representing the remainder intra prediction mode is truncated binary coded.

6. The device of claim 1 , wherein the set of most probable modes comprises five candidate intra prediction modes and a planar mode.

7. The device of claim 6 , wherein the bitstream further comprises a planar flag indicating whether the intra prediction mode of the current block is the planar mode.

8. The device of claim 7 , wherein the planar flag is context adaptive binary arithmetic coding (CABAC) coded.

9. The device of claim 1 , wherein the intra prediction mode of the current block is further derived by:

for i equal to 0 to 4, inclusive, when the intra prediction mode is greater than or equal to a candidate intra prediction mode candModeList[i], incrementing the value of the intra prediction mode by one.

10. A device, comprising:

at least one storage medium configured to store a bitstream; and

a transmitter configured to transmit the bitstream;

wherein the bitstream comprises:

indication information of a current block, a value of the indication information indicating whether an intra prediction mode of the current block is included in a set of most probable modes; and

a syntax element representing a remainder intra prediction mode when the value of the indication information indicates the intra prediction mode of the current block is not included in the set of most probable modes,

wherein the intra prediction mode of the current block is derived by:

for each candidate intra prediction mode candModeList[i] in an array of candidate intra prediction modes, when the intra prediction mode is greater than candModeList[i], reducing a value of the intra prediction mode by one, wherein candModeList[i] represents a candidate intra prediction mode in the set of most probable modes, and wherein i ranges from N to M, inclusive, N and M are natural number, N>M; and

reducing the value of the intra prediction mode by one.

11. The device of claim 10 , wherein

candModeList[i] in the array of candidate intra prediction modes is derived by sorting the candidate intra prediction modes,

for each candModeList[i], candModeList[i]<candModeList[i+1], wherein i ranges from M to N−1.

12. The device of claim 11 , wherein the candidate intra prediction mode candModeList[i] is derived by:

when candModeList[i] is greater than candModeList[i+1], swapping values of candModeList[i] and candModeList[i+1].

13. The device of claim 10 , wherein the value of the indication information is indicated by a flag, and when a value of the flag is not equal to 1, the intra prediction mode of the current block is not in the set of most probable modes.

14. The device of claim 10 , wherein the syntax element is a truncated binary code of a mode that is not in the set of most probable modes.

15. The device of claim 10 , wherein the set of most probable modes comprises five candidate intra prediction modes and a planar mode.

16. The device of claim 15 , wherein the bitstream further comprises a planar flag indicating whether the intra prediction mode of the current block is the planar mode.

17. The device of claim 16 , wherein the planar flag is context adaptive binary arithmetic coding (CABAC) coded.

18. The device of claim 17 , wherein the CABAC indicates whether the current block is an intra block with intra sub-partition (ISP) coding mode enabled, or whether the current block is an intra block with multiple reference line (MRL) enabled.

19. The device of claim 10 , wherein N is 4, M is 0.

Continuity (7)
Continuation 17232946 · Apr 16, 2021
Continuation 17016128 · Sep 9, 2020
Continuation PCTCN2020080674 · Mar 23, 2020
Provisional Application 62824360 · Mar 27, 2019
Provisional Application 62824282 · Mar 26, 2019
Provisional Application 62822865 · Mar 23, 2019
Related Publication 20230025763A1 · Jan 26, 2023