Phasor measurement units, synchrophasor systems and methods thereof
A phasor measurement unit (PMU) of the present disclosure measures phasor, i.e., magnitude and phase angle of voltage and current, and related data from a specific location on the electrical gird synchronized to a common time source. The time-synchronized phasor is called a synchrophasor. In a system of the present disclosure, a plurality of PMUs transmit the synchrophasors and related data to a phasor data concentrator (PDC), which aggregates and time-aligns the data for real time and post analysis. The PMU of the present disclosure further functions as a power quality meter determining at least one of symmetrical components' phasor, frequency, rate of change of frequency, high-speed digital inputs, analog fundamental power and/or displacement power factor.
1. A device comprising:
a voltage input sensor circuit operative to sense line voltage from the AC power system and generate at least one voltage signal representative of the line voltage sensed from the AC power system;
a current input sensor circuit operative to sense line current from the AC power system and generate at least one current signal representative of the line current sensed from the AC power system;
a plurality of analog-to-digital converter circuits configured to sample the at least one voltage signal and the at least one current signal to output digital samples representative of the at least one voltage signal and the at least one current signal;
at least one processor operatively coupled to the plurality of analog-to-digital converter circuits and configured to perform at least one mathematical computation on the digital samples received from the analog-to-digital converter circuits, at least one mathematical computation including determining a magnitude and phase angle of each of the at least one voltage signal and the at least one current signal; and
a clock for time-stamping the determined magnitude and phase angle, the clock being time synchronized with an external time source.
2. The device of claim 1 , where the external source is at least one of an Inter-Range Instrumentation Group-B (IRIG-B) source and/or a Precision Time Protocol (PTP) source.
3. The device of claim 1 , further comprising a communication device that transmits the time-stamped magnitude and phase angle over a network.
4. The device of claim 3 , where the communication device operates under User Datagram Protocol (UDP).
5. The device of claim 4 , wherein the communication device transmits the time-stamped magnitude and phase angle in at least one of a multicast mode, broadcast mode and/or a unicast mode.
6. The device of claim 4 , wherein the communication device supports two simultaneous sessions with external client devices.
7. The device of claim 1 , wherein the at least one mathematical computation further includes determining at least one of symmetrical components' phasor, frequency, rate of change of frequency, high-speed digital inputs, analog fundamental power and/or displacement power factor.
8. The device of claim 1 , wherein the at least one mathematical computation further includes determining at least one power quality event.
9. The device of claim 8 , wherein the power quality event includes at least one of a voltage sag, a voltage swell and/or a voltage transient.
10. A device comprising:
at least one sensor for sensing at least one input voltage and current channel of an electrical distribution system,
at least one input channel for receiving AC voltages and currents from the at least one sensor including at least one analog to digital converter for outputting digitized signals; and
a processing system including a field programmable gate array (FPGA) and a digital signal processor (DSP) coupled to the at least one input channel configured to receive the digitized signals, the FPGA configured to capture high speed inputs and synchronize the captured inputs with an external time source and the DSP is configured to determine a magnitude and phase angle of the captured inputs,
the FPGA further configured to determine a power quality event from the sensed at least one input voltage and current channels.
11. The device of claim 10 , wherein the power quality event includes at least one of a voltage sag, a voltage swell and/or a voltage transient.
12. The device of claim 10 , further comprising a digital input, and wherein the processing system is configured to receive a signal from the digital input and calculate a state and transition of the digital input.
13. The device of claim 12 , wherein the processing system is configured to update the state and transition of the digital input at a peak time event and to report the state and transition of the digital input at a report time event.
14. The device of claim 13 , wherein the report time event is offset from the peak time event.
15. The device of claim 10 , wherein the processing system is configured to apply a correction factor to calculate the phase angle.
16. The device of claim 15 , wherein the correction factor is based on a hardware delay time.
17. The device of claim 15 , wherein the correction factor is based on the difference between a zero crossing time event and a peak time event.
18. The device of claim 1 , further comprising a digital input, and wherein the at least one processor is configured to receive a signal from the digital input and calculate a state and transition of the digital input.
19. The device of claim 18 , wherein the at least one processor is configured to update the state and transition of the digital input at a peak time event and to report the state and transition of the digital input at a report time event.
20. The device of claim 1 , wherein the at least one processor is configured to apply a correction factor to calculate the phase angle.