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Patent Application
Utility
App. No. 17/883,241
· Confirmation No. 3020
Integrated Memory Comprising Gated Regions Between Charge-Storage Devices and Access Devices
Applicant:
Micron Technology, Inc.
Response after Final Action Forwarded to Examiner
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No downloadable documents found — record may not be publicly available.
Inventors
Scott J. Derner
Boise, ID
Charles L. Ingalls
Meridian, ID
Attorneys & Agents of Record
Classification
USPC
257/330
H10D62/151
H10B12/0335
H10B12/50
H10B12/315
H10D62/116
H10D64/519
H10D64/111
H10D30/603
H10D30/6728
G11C5/025
G11C11/407
Prosecution
- Examiner
- CIESLEWICZ, ANETA B
- Art Unit
- 2893
- Customer No.
- 128753
- Docket No.
- MI22-8377
- Confirmation No.
- 3020
Publication
- Pub. No.
- US20220384452A1
- Pub. Date
- 2022-12-01
No recorded assignments were found for this patent.
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Quick Facts
- App. No.
- 17/883,241
- Filed
- 2022-08-08
- Pub. No.
- US20220384452A1
- Examiner
- CIESLEWICZ, ANETA B
- Art Unit
- 2893
External Links