IP Library Granted Patent US 12,347,019
Granted Patent B2
US 12,347,019 · App. 17/885,207 · Granted Jul 1, 2025

Hardware acceleration for ray tracing primitives that share vertices

Inventors: Gregory Muthler (Austin, TX); John Burgess (Austin, TX); Ian Chi Yan Kwong (San Jose, CA)
Assignee: NVIDIA Corporation
G06T15/06G06F9/5027G06T15/08G06T17/10G06T17/205
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Quick Facts
Patent No.
US 12,347,019
App. No.
17/885,207
Granted
Jul 1, 2025
Kind
B2
Abstract

Enhanced techniques applicable to a ray tracing hardware accelerator for traversing a hierarchical acceleration structure and its underlying primitives are disclosed. For example, traversal speed is improved by grouping processing of primitives sharing at least one figure (e.g., a vertex or an edge) during ray-primitive intersection testing. Grouping the primitives for ray intersection testing can reduce processing (e.g., projections and transformations of primitive vertices and/or determining edge function values) because at least a portion of the processing results related to the shared feature in one primitive can be used to determine whether the ray intersects another primitive(s). Processing triangles sharing an edge can double the culling rate of the triangles in the ray/triangle intersection test without replicating the hardware.

Claims (44)

1. A ray tracing method comprising:

receiving a value defining a ray;

receiving vertex values defining a first primitive;

receiving vertex values defining a second primitive;

determine, based on the received vertex values defining the first primitive and the vertex values defining the second primitive, whether the first primitive and the second primitive share at least a portion of an edge;

when the first and second primitives are determined to share at least a portion of an edge, using a common vertex based calculation to test both (a) whether the ray intersects the first primitive and (b) whether the ray intersects the second primitive;

when the first and second primitives are determined not to share at least a portion of an edge, using a first vertex based calculation to test whether the ray intersects the first primitive; and

using a second vertex based calculation different from the first vertex based calculation to test whether the ray intersects the second primitive.

2. The ray tracing method of claim 1 , wherein when the first and second primitives are determined to share at least the portion of the edge, the determining whether the ray intersect the first primitive is performed in parallel with the determining whether the ray intersect the second primitive.

3. The ray tracing method of claim 1 , wherein when the first and second primitives are determined to share at least the portion of the edge, determining whether the ray intersect the first and second primitives is performed in parallel during a same hardware cycle.

4. The ray tracing method of claim 1 , comprising:

projecting the ray into 2D space; and

projecting each vertex of the first primitive into the projected 2D ray coordinate space, project each non-shared vertex of the second primitive into the projected 2D ray coordinate space, and

wherein determining whether the ray intersect the first primitive is performed based on the projected vertices of the first primitive and determining whether the ray intersect the second primitive is performed based on the projected non-shared vertices of the second primitive and at least a portion of the projected vertices of the first primitive.

5. The ray tracing method of claim 1 , wherein the primitives are triangles and the method further comprises: when a first triangle and a second triangle are determined to share the edge, projecting the ray into 2D space, projecting three vertices of the first triangle into the projected 2D ray coordinate space, projecting a single non-shared vertex of the second triangle into the projected 2D ray coordinate space, and wherein determining whether the ray intersect the first triangle is performed based on the three projected vertices of the first triangle and determining whether the ray intersect the second triangle is performed based on the two projected vertices of the first triangle shared with the second triangle and the single projected vertex of the second triangle.

6. The ray tracing method of claim 1 , wherein the method is performed by hardware circuitry that is a part a server or a data center employed in generating an image, and the image is streamed to a user device.

7. The ray tracing method of claim 1 , wherein the method is performed by hardware circuitry employed in generating an image, and the image is used for training, testing, or certifying a neural network employed in a machine, robot, or autonomous vehicle.

8. A ray tracing device comprising circuitry configured to perform operations comprising:

receive a primitive range including a first primitive and a second primitive;

determine whether the first primitive and the second primitive share at least one vertex;

when the first and second primitives are determined to share at least one vertex, transforming vertices of the first primitive and one or more non-shared vertices of the second primitive into 2D ray-coordinate space;

when the first and second primitives are determined to not share at least one vertex, sequentially transforming vertices of the first primitive and the vertices of the second primitive in series into 2D ray-coordinate space; and

determine in 2D ray-coordinate space whether a ray intersects the first primitive and/or the second primitive.

9. The ray tracing device of claim 8 , wherein the first and second primitives are triangles sharing an edge defined by two vertices in each triangle, and transforming the vertices includes transforming three vertices of the first primitive and a single non-shared vertex of the second primitive.

10. The ray tracing device of claim 8 , wherein when the first primitive and the second primitive are determined to be intersected by the ray, the device provides a single hit result per cycle.

11. A device comprising:

memory configured to store at least a portion of an acceleration data structure defining a bounding volume hierarchy; and

hardware circuitry configured to:

receive a query including information about a ray and information about the bounding volume hierarchy;

traverse the bounding volume hierarchy to determine at least one bounding volume within said bounding volume hierarchy the ray intersects, the intersected at least one bounding volume identifying a range of primitives;

determine whether primitives in the range of primitives share an edge;

based on the primitives being determined to share the edge, determine, in parallel, coordinates of the ray relative to a first primitive and coordinates of the ray relative to a second primitive; and

determine whether the first primitive and the second primitive are intersected by the ray based on the determined coordinates.

12. The device of claim 11 , wherein the hardware circuitry includes a first coordinate circuit configured to determine ray intersection coordinates for the first primitive and a second coordinate circuit configured to determine ray intersection coordinates for the second primitive, wherein the first coordinate circuit includes first transform circuitry configured to transform each vertex of the first primitive and the second coordinate circuit includes second transform circuitry configured to transform only a portion of the vertices of the second primitive.

13. The device of claim 12 , wherein the first transform circuitry is configured to transform each vertex of the first primitive into 2D projected ray-coordinate space, and the second transform circuitry is configured to transform each non-shared vertex of the second primitive into 2D projected ray-coordinate space.

14. The device of claim 12 , wherein the first transform circuitry and the second transform circuitry are configured to operate in parallel.

15. The device of claim 12 , wherein the first coordinate circuit includes first edge circuitry is configured to determine edge function values of post-transform first primitive edges based on first primitive vertices transformed by the first transform circuit and second edge circuitry is configured to determine edge function values of post-transform second primitive edges based on second primitive vertices transformed by the second transform circuit and the first transform circuit.

16. The device of claim 15 , wherein the first edge circuitry and the second edge circuitry are configured to operate in parallel.

17. The device of claim 11 , wherein when the first primitive and the second primitive are determined to be intersected by the ray, the device provides a single hit result per cycle.

18. A ray tracing device comprising circuitry configured to perform operations comprising:

receive, from memory configured to store at least a portion of an acceleration data structure including a plurality of hierarchical nodes identifying primitives of a virtual scene, at least one node identifying a plurality of primitives; and

determine primitives identified in the at least one node which are intersected by a ray, wherein determining the primitives which are intersected by the ray includes grouping primitives among the plurality of primitives determined to share at least one vertex for ray intersection testing.

19. The device of claim 18 , wherein determining primitives identified in the at least one node which are intersected by the ray includes transforming vertices of the primitives into 2D ray-coordinate space, and grouping the primitives for ray intersection testing includes using the transformed vertices of a first grouped primitive for ray intersection testing of a second grouped primitive, without transforming all of the vertices of the second grouped primitive.

20. The device of claim 18 , wherein the device is employed in generating an image, and the image is used for training, testing, or certifying a neural network employed in a machine, robot, or autonomous vehicle.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 22, 2025
From: MUTHLER, GREGORY; BURGESS, JOHN; KWONG, IAN CHI YAN
To: NVIDIA CORPORATION
Reel/Frame 071196/0906 →
Continuity (2)
Continuation 16901023 · Jun 15, 2020
Related Publication 20220383583A1 · Dec 1, 2022
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