Common rain buffer for multiple cursors
Methods, systems, and devices for a common error protection buffer for multiple cursors are described. A memory device may receive a command to write data to a memory system. The memory device may assign portions of the data to respective pages of a first cursor and generate error protection data for the assigned data. The memory device may assign the generated error protection data to an error protection buffer common to multiple cursors, for example, by performing an combination operation. The memory device may increment a counter associated with the error protection buffer. The memory device may write a summary of contents of the error protection buffer and a position of each cursor related to the error protection data based on the counter satisfying a threshold. The memory device may perform a readback operation to facilitate garbage collection without losing error protection data.
1. A memory system, comprising:
one or more memory devices; and
processing circuitry coupled with the one or more memory devices and configured to cause the memory system to:
receive a command to write data to the memory system;
assign the data to one or more pages associated with a cursor of the memory system based at least in part on the command;
generate error protection data for the data based at least in part on an error protection configuration; and
assign the error protection data to an error protection buffer that is stored to a nonvolatile memory of the memory system and is common to a plurality of cursors of the memory system based at least in part on generating the error protection data, the error protection buffer for storing a plurality of error protection data associated with the plurality of cursors of the memory system.
2. The memory system of claim 1 , wherein the processing circuitry is further configured to cause the memory system to:
perform an operation to generate second error protection data by combining the error protection data with the plurality of error protection data associated with the plurality of cursors based at least in part on assigning the error protection data to the error protection buffer;
write the second error protection data in the error protection buffer based at least in part on performing the operation; and
increment a counter associated with the error protection buffer based at least in part on writing the second error protection data.
3. The memory system of claim 2 , wherein the processing circuitry is further configured to cause the memory system to:
determine whether the counter satisfies a threshold associated with a quantity of pages based at least in part on incrementing the counter; and
write a summary of contents of the error protection buffer and a position of the plurality of cursors based at least in part on determining that the counter satisfies the threshold.
4. The memory system of claim 3 , wherein the processing circuitry configured to write the summary of contents and the position of the plurality of cursors is further configured to cause the memory system to:
write the summary of contents in a first memory location associated with a first type of memory; and
write a starting position and an ending position associated with each cursor of the plurality of cursors in a second memory location associated with a second type of memory different from the first type of memory.
5. The memory system of claim 4 , wherein the first type of memory comprises non-volatile memory and the second type of memory comprises volatile memory.
6. The memory system of claim 3 , wherein the processing circuitry is further configured to cause the memory system to:
write the data in a data block associated with the cursor based at least in part on the command, wherein generating the error protection data is further based at least in part on writing the data in the data block; and
increment a second counter associated with the data block based at least in part on writing the data.
7. The memory system of claim 6 , wherein the processing circuitry is further configured to cause the memory system to:
determine whether the second counter satisfies a second threshold associated with reading back the data based at least in part on incrementing the second counter;
generate third error protection data for the data in the data block based at least in part on whether the second counter satisfies the second threshold;
perform an operation to generate fourth error protection data for the data in the data block by combining the third error protection data with the summary of contents based at least in part on generating the third error protection data;
write the fourth error protection data in a second error protection buffer associated with the data block based at least in part on generating the third error protection data, the second error protection buffer at a location different from the error protection buffer; and
write a second summary of contents of the second error protection buffer and a second position of the plurality of cursors based at least in part on writing the fourth error protection data.
8. The memory system of claim 6 , wherein the processing circuitry is further configured to cause the memory system to:
determine an error associated with a page of the data block based at least in part on whether the second counter satisfies a second threshold associated with the data block;
generate third error protection data for a portion of the data in the data block that excludes the page based at least in part on determining the error and a position associated with the page;
perform a recovery operation associated with the page based at least in part on performing a first operation to generate fourth error protection data by combining the summary of contents and the third error protection data;
generate fifth error protection data for the data including the page based at least in part on performing the recovery operation;
write sixth error protection data in a second error protection buffer associated with the data block based at least in part on performing a second operation to generate the sixth error protection data by combining the fifth error protection data and the summary of contents; and
write a second summary of contents of the second error protection buffer and a second position of the plurality of cursors based at least in part on writing the sixth error protection data.
9. The memory system of claim 1 , wherein the processing circuitry is further configured to cause the memory system to:
write the data to a data block associated with the cursor based at least in part on assigning the data to the one or more pages;
write second error protection data in a second error protection buffer associated with the data block based at least in part on determining that a counter associated with the data block satisfies a threshold associated with reading back the data, the second error protection data including a portion of the plurality of error protection data; and
write a summary of contents of the second error protection buffer and a position of the plurality of cursors based at least in part on writing the second error protection data.
10. The memory system of claim 1 , wherein the processing circuitry is further configured to cause the memory system to:
write the data to a data block associated with the cursor based at least in part on assigning the data to the one or more pages;
generate second error protection data that excludes a page of the one or more pages based at least in part on determining an error associated with the page;
perform a recovery operation for the page based at least in part on performing an operation to generate third error protection data associated with the page by combining a summary of contents and the second error protection data; and
write a second summary of contents and a position of the plurality of cursors based at least in part on the second error protection data.
11. The memory system of claim 1 , wherein:
the cursor is associated with writing data in triple-level cells of the memory system;
a second cursor is associated with writing data in single-level cells of the memory system; and
the error protection buffer is common to cursors associated with writing the data in the triple-level cells of the memory system.
12. The memory system of claim 1 , wherein the plurality of error protection data comprises the error protection data and second error protection data for second data associated with a plurality of pages associated with the plurality of cursors.
13. The memory system of claim 1 , wherein the processing circuitry is further configured to cause the memory system to:
receive a second command to write second data to the memory system; and
assign second error protection data associated with a second page of the cursor to a second error protection buffer and third error protection data associated with a third page of a second cursor of the plurality of cursors to the second error protection buffer based at least in part on the second command.
14. The memory system of claim 1 , wherein the processing circuitry is further configured to cause the memory system to:
receive a second command to write second data to the memory system; and
assign second error protection data for the second data associated with the one or more pages of the cursor to the error protection buffer based at least in part on the second command.
15. A non-transitory computer-readable medium storing code comprising instructions which, when executed by processing circuitry of an electronic device, cause the electronic device to:
receive a command to write data to a memory system;
assign the data to one or more pages associated with a cursor of the memory system based at least in part on the command;
generate error protection data for the data based at least in part on an error protection configuration; and
assign the error protection data to an error protection buffer that is stored to a nonvolatile memory of the memory system and is common to a plurality of cursors of the memory system based at least in part on generating the error protection data, the error protection buffer for storing a plurality of error protection data associated with the plurality of cursors of the memory system.
16. The non-transitory computer-readable medium of claim 15 , wherein the instructions, when executed by the processing circuitry of the electronic device, further cause the electronic device to:
perform an operation to generate second error protection data by combining the error protection data with the plurality of error protection data associated with the plurality of cursors based at least in part on assigning the error protection data to the error protection buffer;
write the second error protection data in the error protection buffer based at least in part on performing the operation; and
increment a counter associated with the error protection buffer based at least in part on writing the second error protection data.
17. The non-transitory computer-readable medium of claim 16 , wherein the instructions, when executed by the processing circuitry of the electronic device, further cause the electronic device to:
determine whether the counter satisfies a threshold associated with a quantity of pages based at least in part on incrementing the counter; and
write a summary of contents of the error protection buffer and a position of the plurality of cursors based at least in part on determining that the counter satisfies the threshold.
18. The non-transitory computer-readable medium of claim 17 , wherein the instructions, when executed by the processing circuitry of the electronic device, further cause the electronic device to:
write the data in a data block associated with the cursor based at least in part on the command, wherein generating the error protection data is further based at least in part on writing the data in the data block; and
increment a second counter associated with the data block based at least in part on writing the data.
19. The non-transitory computer-readable medium of claim 18 , wherein the instructions, when executed by the processing circuitry of the electronic device, further cause the electronic device to:
determine an error associated with a page of the data block based at least in part on whether the second counter satisfies a second threshold associated with the data block;
generate third error protection data for a portion of the data in the data block that excludes the page based at least in part on determining the error and a position associated with the page;
perform a recovery operation associated with the page based at least in part on performing a first operation to generate fourth error protection data by combining the summary of contents and the third error protection data;
generate fifth error protection data for the data including the page based at least in part on performing the recovery operation;
write sixth error protection data in a second error protection buffer associated with the data block based at least in part on performing a second operation to generate the sixth error protection data by combining the fifth error protection data and the summary of contents; and
write a second summary of contents of the second error protection buffer and a second position of the plurality of cursors based at least in part on writing the sixth error protection data.
20. A method, comprising:
receiving a command to write data to a memory system;
assigning the data to one or more pages associated with a cursor of the memory system based at least in part on the command;
generating error protection data for the data based at least in part on an error protection configuration; and
assigning the error protection data to an error protection buffer that is stored to a nonvolatile memory of the memory system and is common to a plurality of cursors of the memory system based at least in part on generating the error protection data, the error protection buffer for storing a plurality of error protection data associated with the plurality of cursors of the memory system.
21. The method of claim 20 , further comprising:
performing an operation to generate second error protection data by combining the error protection data with the plurality of error protection data associated with the plurality of cursors based at least in part on assigning the error protection data to the error protection buffer;
writing the second error protection data in the error protection buffer based at least in part on performing the operation; and
incrementing a counter associated with the error protection buffer based at least in part on writing the second error protection data.
22. The method of claim 21 , further comprising:
determining whether the counter satisfies a threshold associated with a quantity of pages based at least in part on incrementing the counter; and
writing a summary of contents of the error protection buffer and a position of the plurality of cursors based at least in part on determining that the counter satisfies the threshold.
23. The method of claim 22 , further comprising:
writing the data in a data block associated with the cursor based at least in part on the command, wherein generating the error protection data is further based at least in part on writing the data in the data block; and
incrementing a second counter associated with the data block based at least in part on writing the data.
24. The method of claim 23 , further comprising:
determining whether the second counter satisfies a second threshold associated with reading back the data based at least in part on incrementing the second counter;
generating third error protection data for the data in the data block based at least in part on whether the second counter satisfies the second threshold;
performing an operation to generate fourth error protection data for the data in the data block by combining the third error protection data with the summary of contents based at least in part on generating the third error protection data;
writing the fourth error protection data in a second error protection buffer associated with the data block based at least in part on generating the third error protection data, the second error protection buffer at a location different from the error protection buffer; and
writing a second summary of contents of the second error protection buffer and a second position of the plurality of cursors based at least in part on writing the fourth error protection data.
25. The method of claim 23 further comprising:
determining an error associated with a page of the data block based at least in part on whether the second counter satisfies a second threshold associated with the data block;
generating third error protection data for a portion of the data in the data block that excludes the page based at least in part on determining the error and a position associated with the page;
performing a recovery operation associated with the page based at least in part on performing a first operation to generate fourth error protection data by combining the summary of contents and the third error protection data;
generating fifth error protection data for the data including the page based at least in part on performing the recovery operation;
writing sixth error protection data in a second error protection buffer associated with the data block based at least in part on performing a second operation to generate the sixth error protection data by combining the fifth error protection data and the summary of contents; and
writing a second summary of contents of the second error protection buffer and a second position of the plurality of cursors based at least in part on writing the sixth error protection data.