IP Library Granted Patent US 12,141,590
Granted Patent B2
US 12,141,590 · App. 17/898,306 · Granted Nov 12, 2024

Method, system, and device for software and hardware component boot configuration and content generation

Inventors: Frederic Ruelle (Marigné-Laillé, FR); Emmanuel Grandin (Villeneuve-en-Retz, FR); Bechir Jabri (Ariana, TN)
Assignees: STMicroelectronics (Grand Ouest) SAS; STMicroelectronics France
G06F9/44505G06F3/0482G06F9/4403G06F9/4411G06F9/451
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Quick Facts
Patent No.
US 12,141,590
App. No.
17/898,306
Granted
Nov 12, 2024
Kind
B2
Abstract

System, method, and circuitry for generating content for a programmable computing device based on user-selected configuration information. A settings registry is generated based on the user's selections. The settings registry and the user selected configuration information is utilized to generate the content, such as code, data, parameters, settings, etc. When the content is provided to the programmable computing device, the content initializes, configures, or controls one or more software and hardware aspects of the programmable computing device, such as boot sequence configurations, internal peripheral configurations, states of the programmable computing device, transitions between states of the programmable computing device, etc., and various combinations thereof.

Claims (102)

1. A method, comprising:

presenting, via a graphical user interface to a user, a set of boot configuration options for a project associated with a programmable computing device, the presenting the set of boot configuration options including;

presenting configuration pin settings associated with configuration pins of the programmable computing device;

presenting option byte values associated with option bytes of the programmable computing device; and

presenting the set of boot configuration options;

receiving, via the graphical user interface, a selection of a boot configuration option for the project selected from the presented set of boot configuration options;

generating or updating a settings registry based on the selected boot configuration option; and

generating content for the programmable computing device based on the selected boot configuration option and the settings registry.

2. The method of claim 1 , wherein the presenting the configuration pin settings comprises reading configuration pin settings of the programmable computing device.

3. The method of claim 1 , wherein the presenting the option byte values comprises retrieving option byte values associated with the programmable computing device.

4. The method of claim 1 , wherein the presented set of configuration options is a function of the configuration pin settings.

5. The method of claim 1 , wherein:

the presenting the set of boot configuration options includes presenting a set of boot sequence options.

6. The method of claim 1 , comprising:

providing the content to the programmable computing device.

7. The method of claim 1 , wherein generating the content comprises:

generating initialization code that initializes software of the programmable computing device based on the selected boot configuration option and the settings registry.

8. The method of claim 4 , wherein the presented set of configuration options is a function of the option byte values.

9. The method of claim 4 , wherein the presented option byte values are a function of the selected configuration option and the method comprises selecting option byte settings based on the selected configuration option.

10. The method of claim 5 , wherein, the presenting the boot sequence options includes presenting:

an option to designate a first processing core of a plurality of processing cores as a master and a second processing core of the plurality of processing cores as a slave;

an option to indicate the plurality of processing cores are to be booted sequentially;

an option to indicate the plurality of processing cores are to be booted in parallel;

an option to set synchronization protocols for a processing core of the plurality of processing cores;

an option to set synchronization resources for a processing core of the plurality of processing cores;

an option to set a boot address for a processing core of the plurality of processing cores;

an option to set an execution context associated with a processing core of the plurality of processing cores;

an option to assign memory to a master to store code for execution by a slave;

an option to configure a master to set a data configuration for a slave;

an option to configure a master to set a stack pointer for a slave; or

combinations thereof.

11. A non-transitory computer-readable medium having contents that configure a processing device to perform a method, the method comprising:

presenting, via a graphical user interface to a user, a set of boot configuration options for a project associated with a programmable computing device, the presenting the set of boot configuration options including;

presenting configuration pin settings associated with configuration pins of the programmable computing device;

presenting option byte values associated with option bytes of the programmable computing device; and

presenting the set of boot configuration options;

receiving, via the graphical user interface, a selection of a boot configuration option for the project selected from the presented set of boot configuration options;

generating or updating a settings registry based on the selected boot configuration option; and

generating content for the programmable computing device based on the selected boot configuration option and the settings registry.

12. The non-transitory computer-readable medium of claim 11 , wherein the presenting the configuration pin settings comprises reading configuration pin settings of the programmable computing device.

13. The non-transitory computer-readable medium of claim 11 , wherein the presented set of configuration options is a function of the configuration pin settings.

14. The non-transitory computer-readable medium of claim 11 , wherein the presenting the option byte values comprises retrieving option byte values of the programmable computing device.

15. The non-transitory computer-readable medium of claim 11 , wherein the presented option byte values is are a function of the configuration pin settings.

16. The non-transitory computer-readable medium of claim 11 , wherein:

the presenting the set of boot configuration options includes presenting a set of boot sequence options.

17. The non-transitory computer-readable medium of claim 11 , wherein the method comprises:

providing the generated content to the programmable computing device.

18. The non-transitory computer-readable medium of claim 11 , wherein the contents of the computer-readable medium comprise instructions executable by the processing device.

19. The non-transitory computer-readable medium of claim 16 , wherein, the presenting the boot sequence options includes presenting:

an option to designate a first processing core of a plurality of processing cores as a master and a second processing core of the plurality of processing cores as a slave;

an option to indicate the plurality of processing cores are to be booted sequentially;

an option to indicate the plurality of processing cores are to be booted in parallel;

an option to set synchronization protocols for a processing core of the plurality of processing cores;

an option to set synchronization resources for a processing core of the plurality of processing cores;

an option to set a boot address for a processing core of the plurality of processing cores;

an option to set an execution context associated with a processing core of the plurality of processing cores;

an option to assign memory to a master to store code for execution by a slave;

an option to configure a master to set a data configuration for a slave;

an option to configure a master to set a stack pointer for a slave; or

combinations thereof.

20. A computing device, comprising:

a display device;

a memory, which, in operation, stores computer instructions; and

at least one processor, which, in operation, executes the computer instructions to:

present, via a graphical user interface to a user, a set of boot configuration options for a project associated with a programmable computing device, the presenting the set of boot configuration options including;

presenting configuration pin settings associated with configuration pins of the programmable computing device;

presenting option byte values associated with option bytes of the programmable computing device; and

presenting the set of boot configuration options;

receive, via the graphical user interface, a selection of a boot configuration option for the project selected from the presented set of boot configuration options;

generate or update a settings registry based on the selected boot configuration option; and

generate content for the programmable computing device based on the selected boot configuration option and the settings registry.

21. The computing device of claim 20 , wherein the presenting the configuration pin settings comprises reading configuration pin settings of the programmable computing device.

22. The computing device of claim 20 , wherein the presenting option byte values associated with the programmable computing device comprises retrieving option byte values of the programmable computing device.

23. The computing device of claim 20 , wherein the presented set of configuration options is a function of the configuration pin settings, a function of the option byte values, or a function of both the configuration pin settings and the option byte values.

24. The computing device of claim 20 , wherein:

the presenting the set of boot configuration options includes presenting a set of boot sequence options.

25. The computing device of claim 24 , wherein, the presenting the boot sequence options includes presenting:

an option to designate a first processing core of a plurality of processing cores as a master and a second processing core of the plurality of processing cores as a slave;

an option to indicate the plurality of processing cores are to be booted sequentially;

an option to indicate the plurality of processing cores are to be booted in parallel;

an option to set synchronization protocols for a processing core of the plurality of processing cores;

an option to set synchronization resources for a processing core of the plurality of processing cores;

an option to set a boot address for a processing core of the plurality of processing cores;

an option to set an execution context associated with a processing core of the plurality of processing cores;

an option to assign memory to a master to store code for execution by a slave;

an option to configure a master to set a data configuration for a slave;

an option to configure a master to set a stack pointer for a slave; or

combinations thereof.

26. A system, comprising:

a programmable computing device; and

a non-transitory computer-readable medium having contents, which, in operation, cause a processor to:

present, via a graphical user interface to a user, a set of boot configuration options for a project associated with the programmable computing device, the presenting the set of boot configuration options including;

presenting configuration pin settings associated with configuration pins of the programmable computing device;

presenting option byte values associated with option bytes of the programmable computing device; and

presenting the set of boot configuration options;

receive, via the graphical user interface, a selection of a boot configuration option for the project selected from the presented set of boot configuration options;

generate or update a settings registry based on the selected boot configuration option; and

generate content for the programmable computing device based on the selected boot configuration option and the settings registry.

27. The system of claim 26 , wherein the programmable computing device comprises:

a microprocessor which, in operation, executes the content to initialize software of the programmable computing device.

28. The system of claim 26 , wherein the programmable computing device comprises:

a microprocessor which, in operation, executes the content to initialize hardware of the programmable computing device.

Assignments (3)
CHANGE OF NAME Recorded Jan 10, 2024
From: STMICROELECTRONICS SA
To: STMICROELECTRONICS FRANCE
Reel/Frame 066254/0070 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 27, 2023
From: JABRI, BECHIR
To: STMICROELECTRONICS SA
Reel/Frame 062810/0042 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 27, 2023
From: RUELLE, FREDERIC; GRANDIN, EMMANUEL
To: STMICROELECTRONICS (GRAND OUEST) SAS
Reel/Frame 062810/0078 →
Continuity (4)
Provisional Application 63310041 · Feb 14, 2022
Provisional Application 63310039 · Feb 14, 2022
Provisional Application 63239342 · Aug 31, 2021
Related Publication 20230078144A1 · Mar 16, 2023