IMAGING SYSTEM WITH NOISE REDUCTION
Embodiments include applying a first pulse to a first gate line of a plurality of gate lines of an imaging array; applying a second pulse to other gate lines of the plurality of gate lines while applying the first pulse, the second pulse having a polarity opposite to the first pulse; and sampling pixels coupled to the first gate line while applying the first pulse using sampling circuits.
1 . A method, comprising:
applying a first pulse to a first gate line of a plurality of gate lines of an imaging array;
applying a second pulse to other gate lines of the plurality of gate lines while applying the first pulse, the second pulse having a polarity opposite to the first pulse;
sampling pixels coupled to the first gate line while applying the first pulse using sampling circuits.
2 . The method of claim 1 , further comprising:
resetting the sampling circuits before applying the first pulse.
3 . The method of claim 2 , further comprising:
sampling reset signals associated with the pixels coupled to the first gate line after resetting the sampling circuits and before applying the first pulse.
4 . The method of claim 1 , further comprising:
clamping an output of the sampling circuits.
5 . The method of claim 4 , further comprising:
gating the clamping of the output of the sampling circuits to operate after a start of the first pulse.
6 . The method of claim 1 , further comprising:
generating a voltage for the second pulse; and
filtering the voltage for the second pulse.
7 . The method of claim 6 , further comprising:
bypassing the filtering of the voltage for the second pulse after a mode change of the imaging array.
8 . The method of claim 7 , further comprising:
disabling the bypassing of the filtering of the voltage for the second pulse.
9 . The method of claim 6 , further comprising:
bypassing the filtering of the voltage for the second pulse after a mode change of the imaging array for a predetermined time.
10 . The method of claim 1 , further comprising:
applying the first pulse to a set of multiple adjacent gate lines of the plurality of gate lines including the first gate line;
wherein the other gate lines do not include the set of multiple adjacent gate lines.
11 . The method of claim 1 , further comprising:
measuring a dark level of the imaging array; and
setting a voltage for the second pulse based on the dark level.
12 . A system, comprising:
an imaging array include a plurality of pixels;
a row driver configured to apply voltages to a plurality of gate lines of the imaging array;
sampling circuits configured to sample signals from the pixels of the imaging array;
control logic coupled to the row driver and sampling circuits, wherein the control logic is configured to:
control the row driver to apply a first pulse to a first gate line of the plurality of gate lines;
control the row driver to apply a second pulse to other gate lines of the plurality of gate lines while applying the first pulse, the second pulse having a polarity opposite to the first pulse; and
control the sampling circuits to sample pixels coupled to the first gate line while applying the first pulse.
13 . The system of claim 12 , wherein the control logic is further configured to:
reset the sampling circuits before applying the first pulse.
14 . The system of claim 13 , wherein the control logic is further configured to:
control the sampling circuits to sample reset signals associated with the pixels coupled to the first gate line after resetting the sampling circuits and before applying the first pulse.
15 . The system of claim 12 , wherein the control logic is further configured to:
control the row driver to apply the first pulse to a set of multiple adjacent gate lines of the plurality of gate lines including the first gate line;
wherein the other gate lines do not include the set of multiple adjacent gate lines.
16 . The system of claim 12 , wherein the control logic is further configured to:
clamp an output of the sampling circuits; and
gate the clamping of the output of the sampling circuits to operate after a start of the first pulse.
17 . The system of claim 12 , further comprising:
a voltage generator configured to generate a voltage for the second pulse; and
a filter configured to the voltage for the second pulse,
wherein the control logic is further configured to:
bypass the filter after a mode change of the imaging array; and
disable the bypassing of the filter.
18 . The system of claim 17 , wherein the control logic is further configured to:
measure a dark level of the imaging array; and
set a voltage for the second pulse based on the dark level.
19 . A system, comprising:
means for applying a first pulse to a first gate line of a plurality of gate lines of an imaging array;
means for applying a second pulse to other gate lines of the plurality of gate lines while applying the first pulse, the second pulse having a polarity opposite to the first pulse;
means for sampling pixels coupled to the first gate line while applying the first pulse.
20 . The system of claim 19 , further comprising:
means for generating a voltage for the second pulse;
means for filtering the voltage for the second pulse; and
means for bypassing the filtering of the voltage for the second pulse after a mode change of the imaging array.