IP Library Granted Patent US 50,741
Granted Patent E1
US 50,741 · App. 17/954,718 · Granted Jan 6, 2026

Semiconductor module and portable apparatus provided with semiconductor module

Inventors: Hajime Kobayashi (Saitama, JP); Mayumi Nakasato (Gifu, JP); Ryosuke Usui (Aichi, JP); Yasuyuki Yanase (Gifu, JP); Koichi Saito (Gifu, JP)
Assignee: Adeia Semiconductor Advanced Technologies Inc.
H01L23/3107H01L21/4832H01L21/486H01L21/561H01L21/563H01L23/3128H01L23/49541H01L23/49827H01L23/552H01L24/19H01L24/97H01L24/16H01L24/45H01L24/48H01L24/49H01L24/81H01L2224/02319H01L2224/0401H01L2224/12105H01L2224/16225H01L2224/16245H01L2224/45144H01L2224/48091H01L2224/48227H01L2224/49171H01L2224/73203H01L2224/73204H01L2224/81201H01L2224/81801H01L2224/81894H01L2224/97H01L2924/01005H01L2924/01006H01L2924/01012H01L2924/01013H01L2924/01029H01L2924/0103H01L2924/01033H01L2924/01047H01L2924/01078H01L2924/01079H01L2924/01082H01L2924/01088H01L2924/014H01L2924/14H01L2924/15311H01L2924/181H01L2924/3025H01L2924/351
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Quick Facts
Patent No.
US 50,741
App. No.
17/954,718
Granted
Jan 6, 2026
Kind
E1
Abstract

A semiconductor element mounted on an insulating resin layer formed on a wiring layer is sealed by a sealing resin. On the wiring layer, a protruding electrode protruding to the side of the semiconductor element and a protruding section are integrally formed with the wiring layer, respectively. The protruding electrode is electrically connected to an element electrode of the semiconductor element by penetrating the insulating resin layer. The protruding section is arranged to surround the semiconductor element along the four sides of the semiconductor element, and is embedded in the sealing resin up to a position above a section where the protruding electrode and the element electrode are bonded.

Claims (41)

1 . A semiconductor module, comprising:

a wiring layer of a predetermined pattern;

a semiconductor device mounted on said wiring layer with an insulating resin layer disposed between said semiconductor device and said wiring layer, said semiconductor device having a device electrode disposed counter to said wiring layer;

a bump electrode, penetrating the insulating resin layer, connected to the device element wherein said bump electrode protrudes on a side of said semiconductor device from said wiring layer;

a sealing resin for sealing said semiconductor device; and

a bump disposed along at least one side of said semiconductor device wherein said bump protrudes on a side of said semiconductor device from said wiring layer and is embedded in said sealing resin.

2 . A semiconductor module according to claim 1 , wherein a head portion of said bump is located above a joint between said bump electrode and the device electrode.

3 . A semiconductor module according to claim 1 , wherein said bump is provided along each side of said semiconductor device.

4 . A semiconductor module according to claim 1 , wherein said bump and said bump electrode are formed of the same material.

5 . A semiconductor module according to claim 1 , wherein said bump electrode and said wiring layer are integrally formed with each other.

6 . A semiconductor module according to claim 1 , further comprising a metallic foil covering said sealing resin,

wherein said metallic foil is electrically connected to a part of said bump fixed to a ground potential.

7 . A semiconductor module, comprising:

a substrate;

a wiring layer provided on one main surface of said substrate;

a semiconductor device mounted on said substrate with an insulating resin layer disposed between said semiconductor device and said substrate, said semiconductor device having a device electrode disposed counter to said wiring layer;

a substrate electrode provided on said wiring layer, said substrate electrode being electrically connected to the device electrode;

a sealing resin for sealing said semiconductor device; and

a bump disposed along at least one side of said semiconductor device wherein said bump protrudes on a side of said semiconductor device from said wiring layer and is embedded in said sealing resin; and

a protective layer, provided on said substrate, having an opening in which a bump forming region is exposed, wherein said bump has an embedded portion embedded into the opening of said protective layer and said bump protrudes above an upper face of a periphery of the opening of said protective layer.

8 . A semiconductor module according to claim 7 , wherein a head portion of said bump is located above a joint between said substrate electrode and the device electrode.

9 . A semiconductor module according to claim 7 , wherein said bump is provided along each side of said semiconductor device.

10 . A semiconductor module according to claim 7 , wherein said substrate electrode protrudes on a side of said semiconductor device, and

said substrate electrode is a bump electrode which penetrates the insulating resin layer and connects to the device electrode.

11 . A semiconductor module according to claim 10 , wherein said bump and said substrate electrode are formed of the same material.

12 . A semiconductor module according to claim 7 , further comprising a metallic foil covering said sealing resin,

wherein said metallic foil is electrically connected to a part of said bump fixed to a ground potential.

13 . A semiconductor module according to claim 7 , further comprising a protective layer, provided on said substrate, having an opening in which a bump forming region is exposed,

wherein said bump has an embedded portion embedded into the opening of said protective layer and a bump protruding above an upper face of a periphery of the opening of said protective layer.

14. A semiconductor module, comprising:

a wiring layer of a predetermined pattern disposed on a surface of a first structure, the first structure comprising a singulated semiconductor device mounted on said wiring layer with an insulating resin layer disposed between a surface of the semiconductor device and said wiring layer, wherein:

the first structure does not include a substrate;

the semiconductor device is embedded in a sealing resin; and

the surface of said semiconductor device having a device electrode disposed counter to said wiring layer;

a bump electrode, penetrating the insulating resin layer, connected to the device electrode, wherein said bump electrode protrudes toward said surface of said semiconductor device from said wiring layer;

the sealing resin for sealing said semiconductor device; and

a plurality of electrically conductive bumps disposed along at least a portion of a periphery of said semiconductor device, wherein each one of said plurality of electrically conductive bumps protrudes along a portion of said periphery of said semiconductor device from said wiring laver and is embedded in said sealing resin.

15. The semiconductor module of claim 14 , wherein a head portion of an electrically conductive bump is located above a joint between the bump electrode and the device electrode.

16. The semiconductor module of claim 14 , wherein a set of the plurality of electrically conductive bumps surround the semiconductor device.

17. The semiconductor module of claim 14 , wherein at least one electrically conductive bump of the plurality of electrically conductive bumps and the bump electrode are formed of the same material.

18. The semiconductor module of claim 14 , wherein the surface of the semiconductor device is an active surface.

Assignments (4)
CHANGE OF NAME Recorded Sep 23, 2024
From: TESSERA ADVANCED TECHNOLOGIES, INC.
To: ADEIA SEMICONDUCTOR ADVANCED TECHNOLOGIES INC.
Reel/Frame 069019/0067 →
SECURITY INTEREST Recorded May 3, 2023
From: ADEIA GUIDES INC.; ADEIA IMAGING LLC; ADEIA MEDIA HOLDINGS LLC; ADEIA MEDIA SOLUTIONS INC.; ADEIA SEMICONDUCTOR ADVANCED TECHNOLOGIES INC.; ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.; ADEIA SEMICONDUCTOR INC.; ADEIA SEMICONDUCTOR SOLUTIONS LLC; ADEIA SEMICONDUCTOR TECHNOLOGIES LLC; ADEIA SOLUTIONS LLC
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 063529/0272 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 28, 2022
From: KOBAYASHI, HAJIME; NAKASATO, MAYUMI; USUI, RYOSUKE; YANASE, YASUYUKI; SAITO, KOICHI
To: SANYO ELECTRIC CO., LTD.
Reel/Frame 061244/0631 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 28, 2022
From: SANYO ELECTRIC CO., LTD.
To: TESSERA ADVANCED TECHNOLOGIES, INC.
Reel/Frame 061244/0645 →
Priority Claims (2)
JP 2008-199072 · Jul 31, 2008 · national
JP 2008-255795 · Sep 30, 2008 · national
Continuity (1)
Reissue 13056851 · Jul 29, 2009
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