Fidelity-restorable photonic linear operator
The present disclosure relates to implementations of a photonic circuit, and particularly to a photonic circuit that includes one or more matrix circuits. For example, the present disclosure relates to photonic circuit implementations of unitary matrices, and of arbitrary real and/or complex matrices factorized using unitary matrices, that utilize special generalized Mach-Zehnder interferometers (SGMZIs) as building blocks of various matrix circuit architectures.
1. A unitary matrix circuit, comprising:
a plurality of special generalized Mach-Zehnder interferometers (SGMZIs), wherein each SGMZI in the plurality of SGMZIs includes a GMZI of n dimensions that is augmented with a distinct set of at least n−1 external phase shifters at inputs or outputs of the GMZI, the plurality of SGMZIs including:
a first SGMZI having a first dimensionality; and
a second SGMZI coupled in series to the first SGMZI, the second SGMZI having a second dimensionality greater than the first dimensionality;
a plurality of waveguide paths, the plurality of waveguide paths comprising:
a first waveguide path that guides signals through the first SGMZI and the second SGMZI; and
a second waveguide path that guides signals through the second SGMZI; and
a fidelity restoration block coupled to the plurality of SGMZIs, the fidelity restoration block including attenuators for balancing outputs of the unitary matrix circuit.
2. The unitary matrix circuit of claim 1 , wherein the second waveguide path guides signals through the second SGMZI without guiding signals through the first SGMZI.
3. The unitary matrix circuit of claim 1 , wherein the plurality of SGMZIs includes a third SGMZI having a third dimensionality greater than the first dimensionality and the second dimensionality.
4. The unitary matrix circuit of claim 3 , wherein the plurality of waveguide paths includes a third waveguide path that guides signals through the third SGMZI.
5. The unitary matrix circuit of claim 4 , wherein:
the first waveguide path guides signals through each of the first SGMZI, the second SGMZI, and the third SGMZI;
wherein the second waveguide path guides signals through each of the second SGMZI and the third SGMZI without guiding signals through the first SGMZI; and
the third waveguide path guides signals through the third SGMZI without guiding signals through the first SGMZI and without guiding signals through the second SGMZI.
6. The unitary matrix circuit of claim 5 , wherein the fidelity restoration block includes a first attenuator coupled to the first SGMZI that balances an output of the first waveguide path and a second attenuator coupled to the second SGMZI that balances an output of the second waveguide path.
7. The unitary matrix circuit of claim 6 , wherein the first attenuator and the second attenuator balance the outputs of a first output port and a second output port by applying targeted losses to signals at each of the first output port and the second output port.
8. The unitary matrix circuit of claim 1 , further comprising a plurality of phase shifters configurable to setting matrix values for a unitary matrix.
9. The unitary matrix circuit of claim 8 , wherein a number of the plurality of phase shifters is equal to at least a square of a highest dimensionality of the plurality of SGMZIs.
10. The unitary matrix circuit of claim 1 , wherein each SGMZI from the plurality of SGMZIs having a dimensionality of two or greater includes a pair of optical couplers, the pair of optical couplers associated with a given SGMZI having a dimensionality equal to a corresponding dimensionality of the given SGMZI.
11. A photonic circuit comprising at least one unitary matrix circuit, the at least one unitary matrix circuit including:
a plurality of special generalized Mach-Zehnder interferometers (SGMZIs), wherein each SGMZI in the plurality of SGMZIs includes a GMZI of n dimensions that is augmented with a distinct set of at least n−1 external phase shifters at inputs or outputs of the GMZI, the plurality of SGMZIs including:
a first SGMZI having a first dimensionality; and
a second SGMZI coupled in series to the first SGMZI, the second SGMZI having a second dimensionality greater than the first dimensionality; and
a plurality of waveguide paths, the plurality of waveguide paths comprising:
a first waveguide path that guides signals through the first SGMZI and the second SGMZI; and
a second waveguide path that guides signals through the second SGMZI.
12. The photonic circuit of claim 11 , wherein the at least one unitary matrix circuit further includes a fidelity restoration block including a first attenuator coupled to the plurality of SGMZIs on the first waveguide path associated with the first SGMZI and a second attenuator coupled to the plurality of SGMZIs on the second waveguide path associated with the second SGMZI, wherein the first attenuator and the second attenuator balance the outputs of a first output port and a second output port by applying targeted losses to signals at each of the first output port and the second output port.
13. The photonic circuit of claim 11 , wherein the second waveguide path guides signals through the second SGMZI without guiding signals through the first SGMZI.
14. The photonic circuit of claim 11 , wherein:
the plurality of SGMZIs includes a third SGMZI having a third dimensionality greater than the first dimensionality and the second dimensionality; and
the plurality of waveguide paths includes a third waveguide path that guides signals through the third SGMZI.
15. The photonic circuit of claim 14 , wherein;
the first waveguide path guides signals through each of the first SGMZI, the second SGMZI, and the third SGMZI;
the second waveguide path guides signals through each of the second SGMZI and the third SGMZI without guiding signals through the first SGMZI; and
the third waveguide path guides signals through the third SGMZI without guiding signals through the first SGMZI and without guiding signals through the second SGMZI.
16. The photonic circuit of claim 11 , wherein the at least one unitary matrix circuit includes a plurality of phase shifters configurable to setting matrix values for a unitary matrix, and wherein a number of the plurality of phase shifters is equal to at least a square of a highest dimensionality of the plurality of SGMZIs.