Composite cathode contact for monolithically integrated micro-LEDs, mini-LEDs and LED arrays
An LED device comprises a mesa comprising semiconductor layers, the semiconductor layers including an N-type layer, an active layer, and a P-type layer, the mesa having a top surface and at least one side wall, the at least one side wall defining a trench have a bottom surface. A transparent conductive layer is on at least one side wall and in the trench. A cathode layer is in the trench on the transparent conductive layer. A p-type contact is on the top surface of the mesa. In some embodiments, a spacer layer is formed between the transparent conductive layer and the cathode layer. In other embodiments, a distributed Bragg reflector is formed between the transparent conductive layer and the cathode layer.
1 . A light emitting diode (LED) device comprising:
a mesa comprising semiconductor layers, the semiconductor layers including an N-type layer, an active layer, and a P-type layer, the P-type layer having a top surface and at least one side surface, the active layer having a top surface and at least one side surface, and the N-type layer having a top surface and at least one side surface, the mesa having a top surface and at least one side wall, the at least one side wall formed by the N-type layer, the active layer, and the P-type layer, the at least one side wall defining a trench having a bottom surface;
a transparent conductive layer on the at least one side wall and on the bottom surface of the trench;
a dielectric layer disposed along the side surface of the P-type layer, the side surface of the active layer, and a first portion of the side surface of the N-type layer, the dielectric layer is disposed between the transparent conductive layer and the side surface of the P-type layer, the side surface of the active layer, and the first portion of the side surface of the N-type layer;
a cathode layer disposed along the transparent conductive layer; and
a p-type contact on the top surface of the mesa.
2 . The LED device of claim 1 , wherein the transparent conductive layer comprises zinc oxide.
3 . The LED device of claim 2 , wherein the transparent conductive layer has a thickness in a range of from 10 nm to 500 nm.
4 . The LED device of claim 1 , wherein the dielectric layer comprises a low-refractive index material.
5 . The LED device of claim 4 , wherein the low-refractive index material comprises a material selected from the group consisting of silicon nitride (SiN), titanium oxide (TiO x ), niobium oxide (NbO x ), aluminum oxide (AlO x ), hafnium oxide (HfO x ), tantalum oxide (TaO x ), aluminum nitride (AlN), silicon oxide (SiO x ), and hafnium-doped silicon dioxide (HfSiO x ).
6 . The LED device of claim 1 , wherein the transparent conductive layer is a CVD transparent conductive layer or a sputtered transparent conductive layer.
7 . The LED device of claim 1 , wherein the cathode layer comprises one or more of silver (Ag) and aluminum (Al).
8 . The LED device of claim 1 , wherein the semiconductor layers are epitaxial semiconductor layers having a thickness at least 1 micron.
9 . A method of manufacturing the light emitting diode (LED) device of claim 1 , the method comprising:
depositing a plurality of the semiconductor layers including the N-type layer, the active layer, and the P-type layer on a substrate;
etching a portion of the plurality of semiconductor layers to form the at least one trench and the at least one mesa defining a pixel, the at least one mesa comprising the semiconductor layers, the top surface and the at least one side wall;
depositing the dielectric layer on the side surface of the P-type layer, the side surface of the active layer, and the first portion of the side surface of the N-type layer;
etching to remove the dielectric layer from the bottom surface of the trench and to form an exposed bottom surface of the trench, and to remove a second portion of the side surface of the N-type layer to form an exposed portion of the side surface of the N-type layer;
depositing the transparent conductive layer on the dielectric layer, on the exposed portion of the side surface of the N-type layer, on the top surface of the at least one mesa, and on the bottom surface of the trench;
depositing the cathode layer in the trench and on the transparent conductive layer; and
forming the p-type contact on the top surface of the at least one mesa.
10 . The method of claim 9 , wherein the transparent conductive layer comprises zinc oxide.
11 . The method of claim 10 , wherein the transparent conductive layer has a thickness in a range of from 10 nm to 500 nm.
12 . The method of claim 9 , wherein the dielectric layer comprises a low-refractive index material.
13 . The method of claim 12 , wherein the low-refractive index material comprises a material selected from the group consisting of silicon nitride (SiN), titanium oxide (TiO x ), niobium oxide (NbO x ), aluminum oxide (AlO x ), hafnium oxide (HfO x ), tantalum oxide (TaO x ), aluminum nitride (AlN), silicon oxide (SiO x ), and hafnium-doped silicon dioxide (HfSiO x ).
14 . The method of claim 9 , wherein the transparent conductive layer is a CVD transparent conductive layer or a sputtered transparent conductive layer.
15 . The method of claim 9 , wherein the cathode layer comprises one or more of silver (Ag) and aluminum (Al).
16 . The method of claim 9 , wherein the semiconductor layers are epitaxial semiconductor layers having a thickness at least 1 micron.
17 . A light emitting diode (LED) device comprising:
a mesa comprising semiconductor layers, the semiconductor layers including an N-type layer, an active layer, and a P-type layer, the P-type layer having a top surface and at least one side surface, the active layer having a top surface and at least one side surface, and the N-type layer having a top surface and at least one side surface, the mesa having a top surface and at least one side wall, the at least one side wall formed by the N-type layer, the active layer, and the P-type layer, the at least one side wall defining a trench having a bottom surface;
a dielectric layer disposed along the side surface of the P-type layer, the side surface of the active layer, a first portion of the side surface of the N-type layer, and on the top surface of the mesa;
a zinc oxide layer on the dielectric layer, on a second portion of the side surface of the N-type layer, and on the bottom surface of the trench, the dielectric layer disposed between the zinc oxide layer and the side surface of the P-type layer, the side surface of the active layer, and the first portion of the side surface of the N-type layer;
a cathode layer on the zinc oxide layer; and
a p-contact on the top surface of the mesa.
18 . The LED device of claim 17 , wherein the cathode layer comprises one or more of silver (Ag) and aluminum (Al).
19 . The LED device of claim 17 , wherein the zinc oxide layer is a CVD transparent conductive layer or a sputtered transparent conductive layer.