Display panel and display apparatus

1. A display panel comprising a display area and a non-display area surrounding the display area, the display area comprising a first display area and a second display area, and a light transmittance of the first display area being greater than a light transmittance of the second display area;

the display panel comprising:

a plurality of first pixel units, located in the first display area, the first pixel unit comprising a plurality of first sub-pixels with at least three colors;

a plurality of demultiplexers, located in the non-display area, the demultiplexer comprising at least two signal output terminals with different charging modes,

a plurality of first pixel circuits;

a plurality of first data lines extending in the first display area along a column direction and being distributed at intervals along a row direction, each of the first data lines being electrically connected to at least one first pixel circuit and at least one signal output terminal of the demultiplexer, and the first sub-pixels electrically connected to a same first data line being the first sub-pixels with a same color;

a plurality of second pixel units, located in the second display area, each second pixel unit comprising a plurality of second sub-pixels with at least three colors;

a plurality of second pixel circuits, each of the second sub-pixels being electrically connected to one of the second pixel circuits; and

a plurality of second data lines extending in the second display area along the column direction and being distributed at intervals along the row direction, and each of the second data lines being electrically connected to at least one second pixel circuit and at least one signal output terminal of the demultiplexer;

wherein the first sub-pixels with a same color in the first pixel units are electrically connected to the signal output terminals with a same charging mode in the demultiplexers,

wherein the plurality of second pixel units are distributed in an array in the second display area, and each of the second pixel units comprises a second sub-pixel with a first color, a second sub-pixel with a second color and a second sub-pixel with a third color; and

the second pixel units in a same column are corresponding to the second pixel circuits in three columns, the second pixel circuits in three columns comprise a first column of second pixel circuits, a second column of second pixel circuits and a third column of second pixel circuits; wherein the first column of second pixel circuits and the third column of second pixel circuits are electrically connected to the second sub-pixel with the first color and the second sub-pixel with the third color, the second sub-pixels electrically connected to any two adjacent second pixel circuits in the first column of second pixel circuits have different colors, the second sub-pixels electrically connected to any two adjacent second pixel circuits in the third column of second pixel circuits have different colors, the second sub-pixels electrically connected to two second pixel circuits in a same row and respectively in the first column of second pixel circuits and the third column of second pixel circuits have different colors, and the second column of second pixel circuits are electrically connected to the second sub-pixels with the second color.

2. The display panel of claim 1 , wherein:

each of the first sub-pixels is electrically connected to one of the first pixel circuits.

3. The display panel of claim 2 , wherein the plurality of first pixel units are distributed in an array in the first display area, and the first pixel circuits corresponding to the first sub-pixels with a same color in a same column of the first pixel units are located in a same column.

4. The display panel of claim 2 , wherein each of the first pixel units comprises a first sub-pixel with a first color, a first sub-pixel with a second color and a first sub-pixel with a third color;

each of the first data lines comprises a first sub-data line, a second sub-data line and a third sub-data line;

wherein the first sub-data line is electrically connected to the first sub-pixel with the first color, the second sub-data line is electrically connected to the first sub-pixel with the second color, and the third sub-data line is electrically connected to the first sub-pixel with the third color;

the first pixel units in a same column are corresponding to the first pixel circuits in three columns, the first pixel circuits in three columns comprises a first column of first pixel circuits, a second column of first pixel circuits and a third column of first pixel circuits, and in the first pixel units in a same column, the first pixel circuits corresponding to the first sub-pixels with the second color belongs to the first column of first pixel circuits, and each of the second column of first pixel circuits and the third column of first pixel circuits comprises the first pixel circuit corresponding to the first sub-pixel with the first color and the first pixel circuit corresponding to the first sub-pixel with the third color; and

the first sub-data line and the third sub-data line corresponding to the first pixel units in a same column are interleaved with each other.

5. The display panel of claim 1 , wherein each of the second data lines comprises a fourth sub-data line, a fifth sub-data line and a sixth sub-data line; and

the fourth sub-data line is electrically connected to the first column of second pixel circuits, the fifth sub-data line is electrically connected to the second column of second pixel circuits, and the sixth sub-data line is electrically connected to the third column of second pixel circuits.

6. The display panel of claim 5 , wherein each of the first pixel units comprises a first sub-pixel with a first color, a first sub-pixel with a second color and a first sub-pixel with a third color;

each of the first data lines comprises a first sub-data line, a second sub-data line and a third sub-data line;

wherein the first sub-data line is electrically connected to the first sub-pixel with the first color, the second sub-data line is electrically connected to the first sub-pixel with the second color, and the third sub-data line is electrically connected to the first sub-pixel with the third color; and

each of the first sub-data line, the second sub-data line and the third sub-data line is electrically connected to a corresponding signal output terminal of the demultiplexer through any one of the fourth sub-data line, the fifth sub-data line and the sixth sub-data line in a matching mode.

7. The display panel of claim 6 , wherein each of the demultiplexers comprises a first signal output terminal and a second signal output terminal with different charging modes, the first sub-data line and the third sub-data line are electrically connected to the first signal output terminal, and the second sub-data line is electrically connected to the second signal output terminal.

8. The display panel of claim 7 , wherein each of the demultiplexers comprises a first transistor and a second transistor, a gate of the first transistor is electrically connected to a first control signal terminal, a gate of the second transistor is electrically connected to a second control signal terminal, a first electrode of the first transistor is the first signal output terminal, a first electrode of the second transistor is the second signal output terminal, and a second electrode of the first transistor and a second electrode of the second transistor are electrically connected to a fan-out line.

9. The display panel of claim 6 , wherein each of the first sub-pixel with the first color and the second sub-pixel with the first color is a red sub-pixel, each of the first sub-pixel with the second color and the second sub-pixel with the second color is a green sub-pixel, and each of the first sub-pixel with the third color and the second sub-pixel with the third color is a blue sub-pixel.

10. The display panel of claim 1 , wherein each of the demultiplexers comprises a first signal output terminal and a second signal output terminal, the first signal output terminal is controlled by a first control signal and is configured to output a signal when the first control signal is a low-level signal; and the second signal output terminal is controlled by a second control signal and is configured to output a signal when the second control signal is a low-level signal.

11. The display panel of claim 10 , wherein a low level of the first control signal does not overlap with a low level of a scan signal, a signal output by the first signal output terminal is firstly stored on a signal line and then input to a corresponding first sub-pixel, and a charging mode of the first signal output terminal is wire charging; and a low level of the second control signal overlaps with the low level of the scan signal, a signal output by the second signal output terminal is directly input to a corresponding first sub-pixel, and a charging mode of the second signal output terminal is direct charging.

12. A display apparatus, comprising the display panel of claim 1 .

13. A display panel comprising a display area and a non-display area surrounding the display area, the display area comprising a first display area and a second display area, and a light transmittance of the first display area being greater than a light transmittance of the second display area;

the display panel comprising:

a plurality of first pixel units, located in the first display area, each first pixel unit comprising a plurality of first sub-pixels with at least three colors;

a plurality of demultiplexers, located in the non-display area, each demultiplexer comprising at least two signal output terminals with different charging modes,

a plurality of first pixel circuits, and

a plurality of first data lines extending in the first display area along a column direction and being distributed at intervals along a row direction, each of the first data lines being electrically connected to at least one first pixel circuit and at least one signal output terminal of the demultiplexer, and the first sub-pixels electrically connected to a same first data line being the first sub-pixels with a same color; wherein each of the first pixel units comprises a first sub-pixel with a first color, a first sub-pixel with a second color and a first sub-pixel with a third color;

each of the first data lines comprises a first sub-data line, a second sub-data line and a third sub-data line;

wherein the first sub-data line is electrically connected to the first sub-pixel with the first color, the second sub-data line is electrically connected to the first sub-pixel with the second color, and the third sub-data line is electrically connected to the first sub-pixel with the third color;

the first pixel units in a same column are corresponding to the first pixel circuits in three columns, the first pixel circuits in three columns comprises a first column of first pixel circuits, a second column of first pixel circuits and a third column of first pixel circuits, and in the first pixel units in a same column, the first pixel circuits corresponding to the first sub-pixels with the second color belongs to the first column of first pixel circuits, and each of the second column of first pixel circuits and the third column of first pixel circuits comprises the first pixel circuit corresponding to the first sub-pixel with the first color and the first pixel circuit corresponding to the first sub-pixel with the third color; and

wherein the first sub-pixels with a same color in the first pixel units are electrically connected to the signal output terminals with a same charging mode in the demultiplexers.