Granted Patent B2

US 12,554,413 · App. 17/994,169 · Granted Feb 17, 2026

Inventors: Jin Wook Lee (Seoul, KR); Dong Ouk Moon (Seongnam-si, KR)

Assignee: Samsung Electronics Co., Ltd.

G06F3/0619G06F3/0659G06F3/0679G06F11/1012

Abstract

Claims (39)

1 . An operating method for a storage controller in a storage system including a non-volatile memory (NVM), the operating method comprising:

receiving a write command defining a write operation in accordance with a predictable latency mode of the storage system that defines a deterministic window and a non-deterministic window;

determining that the write operation is performed during the deterministic window;

upon determining that the write operation is performed during the deterministic window, determining that an urgent background operation is not pending in the NVM, and upon determining that the urgent background operation is not pending in the NVM, performing the write operation using a normal write mode; or

upon determining that the write operation is performed during the deterministic window, determining that the urgent background operation is pending in the NVM, analyzing a metric associated with the NVM to generate metric analysis results, selecting a write operation approach from among a plurality of write operation approaches using the metric analysis results to define a selected write operation approach; and

performing the write operation using the selected write operation approach.

2 . The operating method of claim 1 , wherein the metric is one of a program/erase cycle, a read count, an operating temperature, a usage time, a resource level, a read recovery execution time, a program execution time, a deterministic window time, and a deterministic window read/write value.

3 . The operating method of claim 1 , further comprising:

upon determining that the urgent background operation is pending in the NVM:

analyzing the metric associated with the NVM to generate the metric analysis results, selecting the write operation approach from among the plurality of write operation approaches using the metric analysis results, and

performing the write operation using the selected write operation approach.

4 . The operating method of claim 1 , wherein the plurality of write operation approaches includes at least one of: an acceleration write mode using write data compression, a single level write mode, a multi-level write mode, a lower level cell write mode, a higher level cell write mode, a compressed write mode, and a normal write mode.

5 . The operating method of claim 1 , further comprising:

determining a residual time associated with execution of the write operation during the deterministic window.

6 . The operating method of claim 5 , further comprising:

determining a first off set;

determining a second off set; and

comparing the residual time to the first offset and the second offset,

wherein, in response to the residual time being less than the first offset, the selected write operation approach is a lower level cell write mode; and

wherein, in response to the residual time being less than the second offset, the selected write operation approach is one of a single level write mode and a compressed write mode.

7 . The operating method of claim 6 , wherein, in response to the selected write operation approach being the compressed write mode, the write operation is performed during a following non-deterministic window.

8 . The operating method of claim 1 , further comprising:

migrating data written to the NVM by performing the write operation during a following non-deterministic window.

9 . A storage system comprising:

a non-volatile storage device; and

a storage controller configured to control execution of memory access operations by a non-volatile memory (NVM) during a deterministic window defined in relation to a predictable latency mode of the storage system that defines the deterministic window and a nondeterministic window,

wherein the storage controller is further configured to:

analyze a metric associated with the NVM and a memory access operation among the memory access operations to generate metric analysis results,

select an optimal memory access operation approach from a plurality of memory access operation approaches using the metric analysis results,

upon determining that the memory access operation is performed during the deterministic window, determine if there is an urgent background operation pending in the NVM, and

in response to determining that there is an urgent background operation pending in the NVM, perform the memory access operation using the selected optimal memory access operation approach, or

in response to determining that there is no urgent background operation pending in the NVM, perform the memory access operation using a normal write mode.

10 . The storage system of claim 9 , wherein the storage controller is further configured to monitor a residual time associated with execution of the memory access operation during the deterministic window.

11 . The storage system of claim 9 , wherein the metric is one of a program/erase cycle, a read count, an operating temperature, a usage time, a resource level, a read recovery execution time, a program execution time, a deterministic window time, and a deterministic window read/write value.

12 . The storage system of claim 9 , wherein the storage controller is further configured to:

perform another memory access operation that is a read operation during the deterministic window to generate read data,

determine whether the read data includes an uncorrectable error,

upon determining that the read data includes an uncorrectable error, analyze the metric associated with the NVM and the read operation to generate the metric analysis results, and

select a read operation approach from a plurality of read operation approaches using the metric analysis results.

Assignments (1)

Priority Claims (1)

Continuity (1)

References Cited (20)