IP Library Granted Patent US 12,456,422
Granted Patent B2
US 12,456,422 · App. 18/018,876 · Granted Oct 28, 2025

Display panel and display device

Inventors: Yao Huang (Beijing, CN); Jianchang Cai (Beijing, CN); Yue Long (Beijing, CN)
Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.; BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
G09G3/3233H10K59/1213H10K59/1216H10K59/126G09G2300/0408G09G2300/0819G09G2300/0842G09G2300/0861G09G2310/0202G09G2310/08H10K59/131H10K59/65
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Quick Facts
Patent No.
US 12,456,422
App. No.
18/018,876
Granted
Oct 28, 2025
Kind
B2
Abstract

Provided is a display panel. The display panel includes: a base substrate; a plurality of pixel units disposed on the base substrate, wherein the pixel unit includes a pixel circuit and a light-emitting element; a constant voltage line, configured to provide a constant voltage to the pixel circuit; and a plurality of shield electrodes, wherein at least one of the plurality of shield electrodes corresponds to at least one pixel circuit, an orthographic projection of the at least one of the plurality of shield electrodes on the base substrate is at least partially overlapped with an orthographic projection of the corresponding at least one pixel circuit on the base substrate, at least part of the plurality of shield electrodes are connected, and the at least part of the plurality of shield electrodes are electrically connected to the constant voltage line.

Claims (48)

1. A display panel, comprising:

a base substrate;

a plurality of pixel units disposed on the base substrate, wherein the pixel unit comprises a pixel circuit and a light-emitting element, the pixel circuit being configured to drive the light-emitting element;

a constant voltage line, configured to provide a constant voltage to the pixel circuit; and

a plurality of shield electrodes, wherein at least one of the plurality of shield electrodes corresponds to at least one pixel circuit, an orthographic projection of the at least one of the plurality of shield electrodes on the base substrate is at least partially overlapped with an orthographic projection of the corresponding at least one pixel circuit on the base substrate, at least part of the plurality of shield electrodes are connected, the at least part of the plurality of shield electrodes which are connected are electrically connected to the constant voltage line, and in a direction perpendicular to the base substrate, the shield electrode is disposed between a conductive line and the pixel circuit, the conductive line being configured to connect a pixel circuit and a light-emitting element that are in different display regions,

wherein the at least part of the plurality of shield electrodes are connected by a connecting portion, wherein the connecting portion comprises a third connecting portion connected between at least two of the plurality of shield electrodes that are arranged in a third direction, and the at least two of the plurality of shield electrodes are connected in a misaligned manner by the third connecting portion, wherein the third direction intersects the first direction and the second direction, and is parallel to the base substrate; and

wherein the base substrate is provided with a first display region and a second display region, the first display region being on at least one side of the second display region, wherein the first display region comprises a main display region and an auxiliary display region, wherein the main display region is on at least one side of the auxiliary display region, and the auxiliary display region is adjacent to the second display region; and the plurality of shield electrodes that are connected are disposed in both the main display region and the auxiliary display region, only one of the plurality of shield electrodes that are connected in the main display region is connected to the constant voltage line through a first via hole, and shield electrodes in the auxiliary display region are not connected to the constant voltage line.

2. The display panel according to claim 1 , wherein the plurality of shield electrodes comprise a plurality of groups of shield electrodes, wherein each group of the plurality of groups of shield electrodes is extended in a first direction, and the plurality of groups of shield electrodes are arranged in a second direction, the first direction intersecting the second direction, and both the first direction and the second direction being parallel to the base substrate.

3. The display panel according to claim 1 , wherein the first direction is an extension direction of the constant voltage line.

4. The display panel according to claim 1 , wherein

the pixel unit comprises a first pixel unit and a second pixel unit, wherein

the first pixel unit is disposed in the first display region; and

the pixel circuit of the second pixel unit is disposed in the first display region, the light-emitting element of the second pixel unit is disposed in the second display region, and the pixel circuit and the light-emitting element of the second pixel unit are connected by the conductive line.

5. The display panel according to claim 4 , wherein the pixel circuit of the second pixel unit is disposed in the auxiliary display region.

6. The display panel according to claim 1 , further comprising: a first power line, a first initialization signal line and a reset control signal line; wherein the pixel circuit comprises a drive transistor, a first gate signal line, a second gate signal line, a first reset transistor, and a storage capacitor; wherein

a first electrode of the drive transistor is connected to the first power line, a gate of the drive transistor is connected to the first gate signal line, the first gate signal line is connected to the second gate signal line, the second gate signal line is connected to a second electrode of the first reset transistor, a first electrode of the first reset transistor is connected to the first initialization signal line, and a gate of the first reset transistor is connected to the reset control signal line; and

a first electrode of the storage capacitor is connected to the gate of the drive transistor, and a second electrode of the storage capacitor is connected to the first power line.

7. The display panel according to claim 6 , wherein in the second direction, the second electrodes of the storage capacitors of adjacent pixel circuits are connected with each other, at least two of the shield electrodes arranged in the second direction are connected by the second connecting portion, and an orthographic projection of the second connecting portion on the base substrate is at least partially overlapped with an orthographic projection of a connecting portion between the connected second electrodes on the base substrate; or

in the second direction, the second electrodes of the storage capacitors of adjacent pixel circuits are spaced apart.

8. The display panel according to claim 7 , wherein the constant voltage line comprises the first power line or the first initialization signal line.

9. The display panel according to claim 6 , wherein an orthographic projection of at least one of following structures on the base substrate is at least partially within an orthographic projection of the shield electrode on the base substrate:

the gate of the drive transistor;

the first gate signal line;

the second gate signal line;

the second electrode of the first reset transistor; and

a connecting portion between the second electrode of the storage capacitor and the first power line.

10. The display panel according to claim 6 , further comprising: a gate line and a data line; wherein the pixel circuit further comprises a data writing transistor; wherein

a gate of the data writing transistor is connected to the gate line, a first electrode of the data writing transistor is connected to the data line, and a second electrode of the data writing transistor is connected to the first electrode of the drive transistor.

11. The display panel according to claim 10 , wherein the pixel circuit further comprises a threshold compensation transistor and a block; wherein

a first electrode of the threshold compensation transistor is connected to the second electrode of the drive transistor, and a second electrode of the threshold compensation transistor is connected to the second gate signal line, and a gate of the threshold compensation transistor is connected to the gate line;

the threshold compensation transistor comprises a first channel and a second channel, the first channel and the second channel being connected by a conductive connecting portion; and

the block is connected to the first power line, and an orthographic projection of the block on the base substrate is at least partially overlapped with an orthographic projection of the conductive connecting portion on the base substrate.

12. The display panel according to claim 11 , wherein the block is connected to the first power line through a second via hole, wherein an orthographic projection of the second via hole on the base substrate is at least partially within an orthographic projection of the shield electrode on the base substrate.

13. The display panel according to claim 11 , wherein the orthographic projection of the block on the base substrate is partially overlapped with an orthographic projection of the second gate signal line on the base substrate.

14. The display panel according to claim 6 , further comprising: a light-emitting control signal line, wherein the pixel circuit further comprises a first light-emitting control transistor and a second light-emitting control transistor; wherein

a gate of the first light-emitting control transistor is connected to the light-emitting control signal line, a first electrode of the first light-emitting control transistor is connected to the first power line, and a second electrode of the first light-emitting control transistor is connected to the first electrode of the drive transistor; and

a gate of the second light-emitting control transistor is connected to the light-emitting control signal line, a first electrode of the second light-emitting control transistor is connected to the second electrode of the drive transistor, and a second electrode of the second light-emitting control transistor is connected to the light-emitting element.

15. The display panel according to claim 14 , further comprising: a second initialization signal line, wherein the pixel circuit further comprises a second reset transistor; wherein

a gate of the second reset transistor is connected to the reset control signal line, a first electrode of the second reset transistor is connected to the second initialization signal line, and a second electrode of the second reset transistor is connected to the second electrode of the second light-emitting control transistor.

16. The display panel according to claim 1 , wherein the shield electrode comprises an Al layer, a Mo layer, or an Al layer and a Ti layer that are alternately laminated.

17. A display device, comprising a display panel, wherein the display panel comprises:

a base substrate;

a plurality of pixel units disposed on the base substrate, wherein the pixel unit comprises a pixel circuit and a light-emitting element, the pixel circuit being configured to drive the light-emitting element;

a constant voltage line, configured to provide a constant voltage to the pixel circuit; and

a plurality of shield electrodes, wherein at least one of the plurality of shield electrodes corresponds to at least one pixel circuit, an orthographic projection of the at least one of the plurality of shield electrodes on the base substrate is at least partially overlapped with an orthographic projection of the corresponding at least one pixel circuit on the base substrate, at least part of the plurality of shield electrodes are connected, the at least part of the plurality of shield electrodes which are connected are electrically connected to the constant voltage line, and in a direction perpendicular to the base substrate, the shield electrode is disposed between a conductive line and the pixel circuit, the conductive line being configured to connect a pixel circuit and a light-emitting element that are in different display regions,

wherein the at least part of the plurality of shield electrodes are connected by a connecting portion, wherein the connecting portion comprises a third connecting portion connected between at least two of the plurality of shield electrodes that are arranged in a third direction, and the at least two of the plurality of shield electrodes are connected in a misaligned manner by the third connecting portion, wherein the third direction intersects the first direction and the second direction, and is parallel to the base substrate; and

wherein the base substrate is provided with a first display region and a second display region, the first display region being on at least one side of the second display region, wherein the first display region comprises a main display region and an auxiliary display region, wherein the main display region is on at least one side of the auxiliary display region, and the auxiliary display region is adjacent to the second display region; and the plurality of shield electrodes that are connected are disposed in both the main display region and the auxiliary display region, only one of the plurality of shield electrodes that are connected in the main display region is connected to the constant voltage line through a first via hole, and shield electrodes in the auxiliary display region are not connected to the constant voltage line.

18. The display device according to claim 17 , wherein the plurality of shield electrodes comprise a plurality of groups of shield electrodes, wherein each group of the plurality of groups of shield electrodes is extended in a first direction, and the plurality of groups of shield electrodes are arranged in a second direction, the first direction intersecting the second direction, and both the first direction and the second direction being parallel to the base substrate.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 15, 2025
From: BOE TECHNOLOGY GROUP CO., LTD.
To: BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
Reel/Frame 072898/0765 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2023
From: HUANG, YAO; CAI, JIANCHANG; LONG, YUE
To: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.; BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 062540/0901 →
Priority Claims (1)
WO PCT/CN2021/077084 · Feb 20, 2021 · international
Continuity (1)
Related Publication 20230306904A1 · Sep 28, 2023
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