IP Library Granted Patent US 12,513,949
Granted Patent B2
US 12,513,949 · App. 18/038,845 · Granted Dec 30, 2025

Semiconductor device with a side surface having different partial regions

Inventors: Paul Commin (Zürich, CH); Kranthi Kumar Akurati (Seon, CH); Jagoda Dobrzynska (Lenzburg, CH)
Assignee: HITACHI ENERGY LTD
H10D62/104H10D18/00
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Quick Facts
Patent No.
US 12,513,949
App. No.
18/038,845
Granted
Dec 30, 2025
Kind
B2
Abstract

A semiconductor device with a semiconductor body is specified, the semiconductor body extending in a vertical direction between a first main surface and a second main surface opposite the first main surface. The semiconductor body comprises a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type different from the first conductivity type thereby forming a first pn junction, wherein the first semiconductor layer is more heavily doped than the second semiconductor layer. A side surface of the semiconductor body extending between the first main surface and the second main surface delimits the semiconductor body in a lateral direction comprises a first partial region and a second partial region, wherein the first partial region and the second partial region delimit the first semiconductor layer in regions.

Claims (31)

1 . A semiconductor device with a semiconductor body, the semiconductor body extending in a vertical direction between a first main surface and a second main surface opposite the first main surface, wherein

the semiconductor body comprises a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type different from the first conductivity type thereby forming a first pn junction;

the first semiconductor layer is more heavily doped than the second semiconductor layer;

a side surface of the semiconductor body extending between the first main surface and the second main surface delimits the semiconductor body in a lateral direction;

the side surface of the semiconductor body comprises a first partial region and a second partial region;

the first partial region and the second partial region delimit the first semiconductor layer in regions;

the first partial region delimits the first pn junction in the lateral direction;

the second partial region is spaced apart from the first pn junction in the vertical direction; and

the first partial region is arranged at a first angle and the second partial region is arranged at a second angle with respect to the first pn junction wherein the first angle is larger than the second angle;

the side surface comprises a third partial region, the first partial region being arranged between the second partial region and the third partial region, the third partial region directly adjoining the first partial region;

the semiconductor body further comprises a second pn junction, the third partial region delimiting the second pn junction in the lateral direction; and

the first partial region, the second partial region and the third partial region are flat in a cross-sectional view;

the third partial region is arranged at a third angle with respect to the first pn junction, wherein the third angle is larger than the first angle; and

the third angle is between 20° and 60° inclusive.

2 . The semiconductor device according to claim 1 ,

wherein the first angle is between 5° and 20° inclusive.

3 . The semiconductor device according to claim 1 ,

wherein the second angle is between 0.8° and 5° inclusive.

4 . The semiconductor device according to claim 1 ,

wherein a lateral extent of the first partial region is smaller than a lateral extent of the second partial region when seen along the vertical direction.

5 . The semiconductor device according to claim 1 ,

wherein the first angle is constant within the first partial region and the second angle is constant within the second partial region.

6 . The semiconductor device according to claim 1 ,

wherein the first partial region and the second partial region exhibit traces of a mechanical ablation method.

7 . The semiconductor device according to claim 1 ,

wherein the first partial region and the second partial region exhibit traces of a laser ablation method.

8 . The semiconductor device according to claim 1 ,

wherein the second pn junction is formed between the second semiconductor layer and a third semiconductor layer of the first conductivity type.

9 . The semiconductor device according to claim 1 ,

wherein the semiconductor device is a thyristor.

10 . The semiconductor device according to claim 9 , wherein the thyristor has a positive-negative bevel design, wherein the negative bevel comprises the first and second partial region.

Assignments (3)
MERGER Recorded Nov 13, 2023
From: HITACHI ENERGY SWITZERLAND AG
To: HITACHI ENERGY LTD
Reel/Frame 065548/0918 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 25, 2023
From: COMMIN, PAUL; AKURATI, KRANTHI KUMAR; DOBRZYNSKA, JAGODA
To: ABB POWER GRIDS SWITZERLAND AG
Reel/Frame 063763/0805 →
CHANGE OF NAME Recorded May 25, 2023
From: ABB POWER GRIDS SWITZERLAND AG
To: HITACHI ENERGY SWITZERLAND AG
Reel/Frame 063763/0939 →
Priority Claims (1)
EP 20210372 · Nov 27, 2020 · regional
Continuity (1)
Related Publication 20240021672A1 · Jan 18, 2024
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