Macro-pixel display backplane
A micro-light emitting diode (micro-LED) display backplane includes a plurality of macro-pixels. Each macro-pixel includes: a contiguous two-dimensional (2-D) array of bitcells storing display data bits for driving a set of micro-LEDs of a 2-D array of micro-LEDs; and drive circuits configured to generate, based on the display data bits stored in the contiguous 2-D array of bitcells, pulse-width modulated (PWM) drive signals for driving the set of micro-LEDs of the 2-D array of micro-LEDs. In one example, the plurality of macro-pixels is grouped into a plurality of sub-arrays, where each sub-array of the plurality of sub-arrays includes a set of macro-pixels and a local periphery circuit next to the set of macro-pixels. The local periphery circuit includes, for example, a buffer, a repeater, a clock gating circuit for gating an input clock signal to the sub-array, and/or a sub-array decoder for selecting the sub-array.
1. A light emitting diode (LED) driver comprising:
a two-dimensional (2-D) array of macro-pixel drive circuits on an integrated circuit die, each macro-pixel drive circuit of the 2-D array of macro-pixel drive circuits comprising:
a center region including a 2-D array of memory cells configured to store display data for a group of micro-LEDs; and
on each side of two opposing sides of the 2-D array of memory cells,
analog drive circuits for providing drive currents to a respective set of micro-LEDs of the group of micro-LEDs; and
digital drive circuits positioned between the analog drive circuits and the 2-D array of memory cells and configured to control the analog drive circuits using the display data stored in the 2-D array of memory cells,
wherein the digital drive circuits on a first side of the two opposing sides of the 2-D array of memory cells comprise a comparator shared by the digital drive circuits on the two opposing sides, the comparator configured to compare, for each micro-LED of the group of micro-LEDs, display data for driving the micro-LED with a counter value.
2. The LED driver of claim 1 , wherein the digital drive circuits are configured to generate, based on the display data stored in the 2-D array of memory cells, pulse-width modulated (PWM) signals for controlling the analog drive circuits.
3. The LED driver of claim 1 , wherein the digital drive circuits on the first side of the two opposing sides of the 2-D array of memory cells further comprise an input/output circuit configured to read the display data stored in the 2-D array of memory cells and provide the display data to the comparator, wherein the input/output circuit is shared by the digital drive circuits on the two opposing sides of the 2-D array of memory cells.
4. The LED driver of claim 1 , wherein the comparator is configured to compare the counter value with display data for different micro-LEDs of the group of micro-LEDs in different respective time windows.
5. The LED driver of claim 1 , wherein the 2-D array of memory cells includes a 2-D array of six-transistor (6T) static random access memory (SRAM) cells.
6. The LED driver of claim 1 , wherein the 2-D array of memory cells includes at least 6 bit-cells for each micro-LED of the group of micro-LEDs.
7. The LED driver of claim 1 , wherein the group of micro-LEDs includes 8 or more micro-LEDs.
8. The LED driver of claim 1 , wherein each macro-pixel drive circuit of the 2-D array of macro-pixel drive circuits further comprises, on each side of the two opposing sides of the 2-D array of memory cells:
a first transition region between the 2-D array of memory cells and the digital drive circuits; and
a second transition region between the digital drive circuits and the analog drive circuits.
9. The LED driver of claim 1 , wherein the analog drive circuits comprise, for each micro-LED in the respective set of micro-LEDs, a thick gate-oxide transistor with a channel length greater than 400 nm.
10. The LED driver of claim 1 , wherein the digital drive circuits comprise a respective design-for-test (DFT) circuit for each micro-LED in the respective set of micro-LEDs.
11. The LED driver of claim 1 , wherein the 2-D array of macro-pixel drive circuits includes a plurality of sub-arrays of macro-pixel drive circuits, each sub-array of macro-pixel drive circuits of the plurality of sub-arrays of macro-pixel drive circuits including a local periphery circuit and a set of macro-pixel drive circuits arranged in a two-dimensional array.
12. The LED driver of claim 11 , wherein the 2-D array of memory cells of a first macro-pixel drive circuit and the 2-D array of memory cells of a second macro-pixel drive circuits in each sub-array of macro-pixel drive circuits of the plurality of sub-arrays of macro-pixel drive circuits are adjacent to each other to form a contiguous memory block.
13. The LED driver of claim 11 , wherein the local periphery circuit of each sub-array of macro-pixel drive circuits comprises at least one of a buffer, a repeater, a clock gating circuit for gating an input clock signal, or a sub-array decoder for selecting the sub-array of macro-pixel drive circuits.
14. The LED driver of claim 13 , wherein the clock gating circuit is configured to block or transmit the input clock signal to the sub-array of macro-pixel drive circuits to enable or disable the digital drive circuits of the sub-array of macro-pixel drive circuits.
15. The LED driver of claim 11 , wherein the plurality of sub-arrays is grouped into a plurality of slices, each slice of the plurality of slices including a set of sub-arrays of the plurality of sub-arrays and a slice periphery circuit next to the set of sub-arrays.
16. The LED driver of claim 15 , wherein the slice periphery circuit includes at least one of a counter or a look-up table for gamma correction, the look-up table storing display data codes and corresponding counter values.
17. The LED driver of claim 16 , wherein a corresponding counter value for at least one display data code in the look-up table is different from an ideal counter value determined for the at least one display data code based on a gamma value.
18. The LED driver of claim 15 , wherein the slice periphery circuit of each slice of the plurality of slices includes a calibration table for calibrating the analog drive circuits of macro-pixel drive circuits in the slice.
19. The LED driver of claim 15 , wherein slice periphery circuits of the plurality of sub-arrays of macro-pixel drive circuits are in at least two opposite peripheral regions of the 2-D array of macro-pixel drive circuits.