IP Library Granted Patent US 11,837,954
Granted Patent B2
US 11,837,954 · App. 18/063,703 · Granted Dec 5, 2023

Power supply for gate driver in switched-capacitor circuit

Inventors: David Giuliano (Bedford, NH); Gregory Szczeszynski (Nashua, NH); Raymond Barrett, Jr. (Merrimack, NH)
Assignee: pSemi Corporation
H02M3/07H02M1/088H02M3/073
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Quick Facts
Patent No.
US 11,837,954
App. No.
18/063,703
Granted
Dec 5, 2023
Kind
B2
Abstract

An apparatus includes first and second pluralities of switches, a controller for controlling these switches, gate-drivers for driving switches from the first plurality of switches, and first and second terminals configured for coupling to corresponding first and second external circuits at corresponding first and second voltages. During operation, the controller causes the first plurality of switches to transition between states. These transitions result in the second voltage being maintained at a value that is a multiple of the first voltage. The controller also causes the second plurality of switches to transition between states. These transitions resulting in capacitors being coupled or decoupled from the second voltage. The gate drivers derive, from the capacitors, charge for causing a voltage that enables switches from the first plurality of switches to be driven.

Claims (32)

1. An integrated circuit for controlling a charge pump circuit, the charge pump circuit including a plurality of switches and a plurality of capacitors coupled to the plurality of switches along a charge transfer path between an input port and an output port of the charge pump circuit, the integrated circuit comprising:

a control circuit comprising:

one or more gate drivers to drive the plurality of switches;

one or more level shifters coupled to the one or more gate drivers to shift a voltage level of an input signal before providing the input signal to the one or more gate drivers;

a voltage regulator to regulate power provided to the one or more gate drivers; and

a delay circuit coupled to the one or more gate drivers to delay the input signal before providing the input signal to the one or more gate drivers.

2. The integrated circuit of claim 1 , wherein the control circuit further comprises:

one or more switching elements respectively coupled to the one or more gate drivers, wherein any of the one or more switching elements is controlled by a corresponding bias voltage to provide a supply voltage to a corresponding gate driver, the supply voltage being a first value or a second value in response to the corresponding bias voltage.

3. The integrated circuit of claim 2 , wherein a first terminal of the switching element is to receive a first voltage, and a second terminal of the switching element is coupled to the corresponding gate driver.

4. The integrated circuit of claim 3 , wherein the supply voltage is equal to the first voltage, in the condition that the switching element operates in a first state in response to the corresponding bias voltage.

5. The integrated circuit of claim 4 , wherein the supply voltage is lower than the first voltage, in the condition that the switching element operates in a second state in response to the corresponding bias voltage.

6. The integrated circuit of claim 3 , wherein the first terminal of the switching element is coupled to a corresponding capacitor to receive the first voltage.

7. The integrated circuit of claim 1 , wherein during operation, the control circuit causes the plurality of switches to switch between successive states to interconnect the plurality of capacitors to the input port and the output port of the charge pump circuit.

8. The integrated circuit of claim 1 , wherein the one or more gate drivers receive a time-varying voltage from the charge pump circuit.

9. The integrated circuit of claim 1 , wherein any of the one or more gate drivers includes transistors forming a plurality of inverters coupled in series, and each subsequent inverter is larger than a previous inverter.

10. The integrated circuit of claim 1 , wherein the control circuit generates one or more driving signals to drive the plurality of switches based, at least in part, on one or more timing signals.

11. The integrated circuit of claim 10 , wherein the one or more driving signals are used to provide a voltage at an output port of the charge pump circuit, to change a gain of the charge pump circuit, to shut off the charge pump circuit in response to a fault condition, or any combination thereof.

12. An integrated circuit for operating a charge pump circuit having a plurality of pump capacitors along one or more charge transfer paths, the integrated circuit comprising:

a plurality of terminals respectively coupled to the plurality of pump capacitors;

a plurality of power switches coupled to the plurality of pump capacitors via the plurality of terminals and forming a charge transfer path between an input port and an output port of the charge pump circuit; and

a control circuit, comprising:

one or more gate drivers including transistors forming a tapered inverter chain to drive the plurality of switches, wherein each gate driver receives a first driver signal or a second driver signal, the first driver signal and the second driver signal being non-overlapping;

a level shifter to shift a voltage level of an input signal before providing the input signal to the one or more gate drivers; and

one or more switching elements respectively coupled to the one or more gate drivers, wherein any of the one or more switching elements is controlled by a corresponding bias voltage to provide a supply voltage to a corresponding gate driver, the supply voltage being a first value or a second value in response to the corresponding bias voltage.

13. The integrated circuit of claim 12 , wherein the first driver signal and the second driver signal are respectively synchronized with a first phase voltage and a second phase voltage of the charge pump circuit, the first phase voltage and the second phase voltage are out of phase.

14. The integrated circuit of claim 12 , wherein the control circuit further comprises: a control circuit to generate the driver signal and the bias voltage.

15. The integrated circuit of claim 12 , wherein a first terminal of the switching element is to receive a first voltage, and a second terminal of the switching element is coupled to the corresponding gate driver.

16. The integrated circuit of claim 15 , wherein the supply voltage is equal to the first voltage, in the condition that the switching element operates in a first state in response to the corresponding bias voltage.

17. The integrated circuit of claim 16 , wherein the supply voltage is lower than the first voltage, in the condition that the switching element operates in a second state in response to the corresponding bias voltage.

18. The integrated circuit of claim 17 , wherein the first terminal of the switching element is coupled to a corresponding capacitor to receive the first voltage.

19. The integrated circuit of claim 15 , wherein the supply voltage is lower than the first voltage.

20. The integrated circuit of claim 12 , wherein during operation, the control circuit causes the plurality of switches to switch between successive states to interconnect the plurality of pump capacitors to the input port and the output port of the charge pump circuit.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 21, 2024
From: BARRETT, RAYMOND, JR.
To: PSEMI CORPORATION
Reel/Frame 066514/0234 →
EMPLOYEE AGREEMENT Recorded Dec 13, 2023
From: GIULIANO, DAVID; SZCZESZYNSKI, GREGORY; BARRETT JR., RAYMOND
To: ARCTIC SAND TECHNOLOGIES, INC.
Reel/Frame 066722/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2022
From: GIULIANO, DAVID; SZCZESZYNSKI, GREGORY; BARRETT, RAYMOND, JR.
To: ARCTIC SAND TECHNOLOGIES, INC.
Reel/Frame 062035/0687 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2022
From: ARCTIC SAND TECHNOLOGIES, INC.
To: PEREGRINE SEMICONDUCTOR CORPORATION
Reel/Frame 062035/0727 →
CHANGE OF NAME Recorded Dec 9, 2022
From: PEREGRINE SEMICONDUCTOR CORPORATION
To: PSEMI CORPORATION
Reel/Frame 062104/0207 →
Continuity (8)
Continuation 17451666 · Oct 21, 2021
Continuation 16840188 · Apr 3, 2020
Continuation 16385320 · Apr 16, 2019
Continuation 15813505 · Nov 15, 2017
Continuation 15272935 · Sep 22, 2016
Continuation 14276426 · May 13, 2014
Continuation 13837796 · Mar 15, 2013
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